PEB20256E-V21 Infineon Technologies, PEB20256E-V21 Datasheet - Page 54

• Manufacturer Part Number: PEB20256E-V21
• Description: IC CONTROLLER INTERFACE 388-BGA
• Manufacturer: Infineon Technologies

Specifications of PEB20256E-V21

• Function: Multichannel Network Interface Controller (MUNICH)
• Interface: HDLC, PPP, Serial, TMA
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 200mA
• Power (watts): 3W
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 388-BBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Circuits: -
• Other names: PEB20256E-V21; PEB20256E-V21IN

4.1.4
The MUNICH256 supports a remote payload loop for each of the 16 (28) lines), where
the incoming serial data stream of a selected port is mirrored to the outgoing serial data
stream of the same port. The F-bit (T1 mode) is not looped.
In receive direction the payload is stored in an internal loop buffer and in transmit
direction this payload data is taken from the loop buffer and inserted in the outgoing bit
stream. This internal loop buffer compensates for receive clock and transmit clock jitter.
Nevertheless, the average clock rate of the receive port and the transmit port must be
the same. After first activation the payload of one frame is written to the loop FIFO. Then
the time slot assigner starts reading data bytes out of the loop buffer and inserts them
into the transmit data path. Due to a receive/transmit clock jitter the read pointer may
move towards the write pointer. In case the distance between write pointer and read
pointer is equal plus/minus 1 byte a slip of the read pointer will occur.
For ports configured in 8.192 MBit/s mode the receive clock and the transmit clock must
be synchronous.
•
Figure 4-3
Data Sheet
RCLK(x)
TCLK(x)
RSP(x)
TSP(x)
1
RD(x)
TD(x)
In T1/E1 mode only. Framer is disabled in unchannelized mode.
Remote Payload Loop
Remote Payload Loop
Transmit
Receive
Port
Port
Assigner
Assigner
Timeslot
Timeslot
54
Buffer
Loop
+
Functional Description
Machine
Machine
Protocol
Protocol
PEB 20256 E
PEF 20256 E
04.2001
PCI
F r o
PCI
To
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