AT32UC3A3256S Atmel Corporation, AT32UC3A3256S Datasheet - Page 38
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AT32UC3A3256S
Manufacturer Part Number
AT32UC3A3256S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3256S
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A3256S-ALUT
Manufacturer:
MOLEX
Quantity:
20 000
Part Number:
AT32UC3A3256S-U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 38 of 1012
- Download datasheet (16Mb)
Table 5-2.
5.4
32072G–11/2011
CPU Local Bus Mapping
Peripheral Address Mapping
0xFFFF5000
0xFFFF5400
Some of the registers in the GPIO module are mapped onto the CPU local bus, in addition to
being mapped on the Peripheral Bus. These registers can therefore be reached both by
accesses on the Peripheral Bus, and by accesses on the local bus.
Mapping these registers on the local bus allows cycle-deterministic toggling of GPIO pins since
the CPU and GPIO are the only modules connected to this bus. Also, since the local bus runs at
CPU speed, one write or read operation can be performed per clock cycle to the local bus-
mapped GPIO registers.
The following GPIO registers are mapped on the local bus:
Table 5-3.
Port
0
1
Register
Output Driver Enable Register (ODER)
Output Value Register (OVR)
Pin Value Register (PVR)
Output Driver Enable Register (ODER)
Output Value Register (OVR)
Pin Value Register (PVR)
Local Bus Mapped GPIO Registers
TWIS0
TWIS1
Two-wire Slave Interface - TWIS0
Two-wire Slave Interface - TWIS1
Mode
WRITE
SET
CLEAR
TOGGLE
WRITE
SET
CLEAR
TOGGLE
-
WRITE
SET
CLEAR
TOGGLE
WRITE
SET
CLEAR
TOGGLE
-
Local Bus
Address
0x40000040
0x40000044
0x40000048
0x4000004C
0x40000050
0x40000054
0x40000058
0x4000005C
0x40000060
0x40000140
0x40000144
0x40000148
0x4000014C
0x40000150
0x40000154
0x40000158
0x4000015C
0x40000160
Access
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Read-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Read-only
38
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