AT32UC3A3256S Atmel Corporation, AT32UC3A3256S Datasheet - Page 569
AT32UC3A3256S
Manufacturer Part Number
AT32UC3A3256S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3256S
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A3256S-ALUT
Manufacturer:
MOLEX
Quantity:
20 000
Part Number:
AT32UC3A3256S-U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 569 of 1012
- Download datasheet (16Mb)
25.6.5.3
Figure 25-34. IrDA Demodulator Operations
25.6.6
32072G–11/2011
CLK_USART
Receiver
Counter
Value
Input
RXD
RS485 Mode
IrDA Demodulator
6
5
4
Rejected
Table 25-11. IrDA Baud Rate Error (Continued)
The demodulator depends on an 8-bit down counter loaded with the value in IRDA_Filter field in
the IrDA Filter Register (IFR.IRDA_FILTER). When a falling edge on RXD is detected, the coun-
ter starts decrementing at CLK_USART speed. If a rising edge is detected on RXD, the counter
stops and is reloaded with the IFR value. If no rising edge has been detected when the counter
reaches zero, the receiver input is pulled low during one bit period. See
one to the Infrared Receive Line Filter bit (MR.FILTER), enables a noise filter that, instead of
using just one sample, will choose the majority value from three consecutive samples.
The USART features an RS485 mode, supporting line driver control. This supplements normal
synchronous and asynchronous mode by driving the RTS pin high when the transmitter is oper-
ating. The RTS pin level is the inverse of the CSR.TXEMPTY value. Writing 0x1 to MR.MODE
enables this mode. A typical connection to a RS485 bus is shown in
Figure 25-35. Typical Connection to a RS485 Bus
If a timeguard has been configured the RTS pin will remain high for the duration specified in TG,
as shown in
Pulse
Peripheral Clock
3 686 400
20 000 000
32 768 000
3
2
6
Figure
6
25-36.
5
Baud Rate
4
2 400
2 400
2 400
USART
3
2
RXD
TXD
RTS
1
0
Accepted
Pulse
521
853
CD
96
Driven Low During 16 Baud Rate Clock Cycles
Baud Rate Error
0.00%
0.03%
0.04%
Differential
Bus
Figure
Figure
25-35.
Pulse Time
25-34. Writing a
78.13
78.13
78.13
569
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