AT32UC3A3256S Atmel Corporation, AT32UC3A3256S Datasheet - Page 884
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AT32UC3A3256S
Manufacturer Part Number
AT32UC3A3256S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3256S
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A3256S-ALUT
Manufacturer:
MOLEX
Quantity:
20 000
Part Number:
AT32UC3A3256S-U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 884 of 1012
- Download datasheet (16Mb)
32.3.2
32.3.3
32.4
32.4.1
32072G–11/2011
Functional Description
Clocks
Interrupts
Operation Modes
The clock for the AES bus interface (CLK_AES) is generated by the Power Manager. This clock
is enabled at reset, and can be disabled in the Power Manager. It is recommended to disable the
AES before disabling the clock, to avoid freezing the AES in an undefined state.
The AES interrupt request line is connected to the interrupt controller. Using the AES interrupt
requires the interrupt controller to be programmed first.
The AES specifies a FIPS-approved cryptographic algorithm that can be used to protect elec-
tronic data. The AES algorithm is a symmetric block cipher that can encrypt (encipher) and
decrypt (decipher) information.
Encryption converts data to an unintelligible form called ciphertext. Decrypting the ciphertext
converts the data back into its original form, called plaintext. The Processing Mode bit in the
Mode Register (MR.CIPHER) allows selection between the encryption and the decryption
processes.
The AES is capable of using cryptographic keys of 128/192/256 bits to encrypt and decrypt data
in blocks of 128 bits. This 128-bit/192-bit/256-bit key is defined in the KEYWnR Registers
(KEYWnR).
The input to the encryption processes of the CBC, CFB, and OFB modes includes, in addition to
the plaintext, a 128-bit data block called the initialization vector, which must be writing in the Ini-
tialization Vector Registers (IVnR). The initialization vector is used in an initial step in the
encryption of a message and in the corresponding decryption of the message. The IVRnR regis-
ters are also used in the CTR mode to set the counter value.
The AES supports the following modes of operation:
The data pre-processing, post-processing and chaining for the concerned modes are automati-
cally performed. Refer to the NIST Special Publication 800-38A Recommendation for more
complete information.
These modes are selected by writing the Operation Mode field in the Mode Register
(MR.OPMOD).
In CFB mode, five data size are possible (8 bits, 16 bits, 32 bits, 64 bits or 128 bits).
• ECB: Electronic Code Book
• CBC: Cipher Block Chaining
• OFB: Output Feedback
• CFB: Cipher Feedback
• CTR: Counter
– CFB8 (CFB where the length of the data segment is 8 bits)
– CFB16 (CFB where the length of the data segment is 16 bits)
– CFB32 (CFB where the length of the data segment is 32 bits)
– CFB64 (CFB where the length of the data segment is 64 bits)
– CFB128 (CFB where the length of the data segment is 128 bits)
884
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