AT32UC3A3256S Atmel Corporation, AT32UC3A3256S Datasheet - Page 578
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AT32UC3A3256S
Manufacturer Part Number
AT32UC3A3256S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3256S
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A3256S-ALUT
Manufacturer:
MOLEX
Quantity:
20 000
Part Number:
AT32UC3A3256S-U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 578 of 1012
- Download datasheet (16Mb)
25.6.9.11
25.6.9.12
Figure 25-44. Frame Slot Mode with Automatic Checksum
32072G–11/2011
TXRDY
Write
LINID
Write
THR
LINTC
Break
Checksum
Frame Slot Mode
Header
Synch
Table 25-14. Response Data Length if DLM = 1
The last frame field is the checksum. It is configured by the Checksum Type (LINMR.CHKTYP),
and the Checksum Disable (LINMR.CHKDIS) bits. TXRDY will not be set after the last THR data
write if enabled. Writing a one to CHKDIS will disable the automatic checksum genera-
tion/checking, and the user may send/check this last byte manually, disguised as a normal data.
The checksum is an inverted 8-bit sum with carry, either:
A LIN master can be configured to use frame slots with a pre-defined minimum length. Writing a
one to the Frame Slot Mode Disable bit (LINMR.FSDIS) disables this mode. This mode will not
allow TXRDY to be set after a frame transfer until the entire frame slot duration has elapsed, in
effect preventing the master from sending a new header. The LIN Transfer Complete bit
(CSR.LINTC) will still be set after the checksum has been sent. Writing a one to CR.RSTST
clears LINTC.
The minimum frame slot size is determined by TFrame_Maximum, and calculated below (all val-
ues in bit periods):
• DLM=1: the response data length is defined by the Identifier bits according to the table below.
• over all data bytes, called a classic checksum. This is used for LIN 1.3 compliant slaves, and
• over all data bytes and the protected identifier, called an enhanced checksum. This is used
• THeader_Nominal = 34
automatically managed when CHKDIS=0, and CHKTYP=1.
for LIN 2.0 compliant slaves, and automatically managed when CHKDIS=0, and CHKTYP=0.
Data 1
IDCHR[5]
Protected
Identifier
Data3
0
0
1
1
Frame slot = TFrame_Maximum
Response
space
Data 2
Frame
Data 1
Data 3
IDCHR[4]
0
1
0
1
Data N
Response
Data N-1
Response Data Length [bytes]
Data N
Frame Slot Mode
Checksum
2
2
4
8
Disabled
Frame Slot Mode
frame
space
Inter-
Enabled
578
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