ATmega1280 Atmel Corporation, ATmega1280 Datasheet - Page 28

• Manufacturer Part Number: ATmega1280
• Manufacturer: Atmel Corporation

Specifications of ATmega1280

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 86
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 1
• Uart: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 16
• Input Capture Channels: 4
• Pwm Channels: 15
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

9. External Memory Interface
9.1
2549N–AVR–05/11
Overview
With all the features the External Memory Interface provides, it is well suited to operate as an
interface to memory devices such as External SRAM and Flash, and peripherals such as LCD-
display, A/D, and D/A. The main features are:
•
•
•
•
When the eXternal MEMory (XMEM) is enabled, address space outside the internal SRAM
becomes available using the dedicated External Memory pins (see
13-3 on page
tion is shown in
Figure 9-1.
Four different wait-state settings (including no wait-state)
Independent wait-state setting for different External Memory sectors (configurable sector size)
The number of bits dedicated to address high byte is selectable
Bus keepers on data lines to minimize current consumption (optional)
78,
External Memory with Sector Select
Figure
Table 13-9 on page
9-1.
External Memory
(0 - 60K x 8)
ATmega640/1280/1281/2560/2561
82, and
Memory Configuration A
Internal memory
Lower sector
Upper sector
Table 13-21 on page
SRW01
SRW00
SRW11
SRW10
0x0000
0x21FF
0x2200
0xFFFF
SRL[2..0]
Figure 1-3 on page
90). The memory configura-
4,
Table
28