ATmega1280 Atmel Corporation, ATmega1280 Datasheet - Page 53

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ATmega1280

Manufacturer Part Number
ATmega1280
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega1280

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
86
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
1
Uart
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
16
Input Capture Channels
4
Pwm Channels
15
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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11.3
11.4
11.5
2549N–AVR–05/11
ADC Noise Reduction Mode
Power-down Mode
Power-save Mode
Idle mode enables the MCU to wake up from external triggered interrupts as well as internal
ones like the Timer Overflow and USART Transmit Complete interrupts. If wake-up from the
Analog Comparator interrupt is not required, the Analog Comparator can be powered down by
setting the ACD bit in the Analog Comparator Control and Status Register – ACSR. This will
reduce power consumption in Idle mode. If the ADC is enabled, a conversion starts automati-
cally when this mode is entered.
When the SM2:0 bits are written to 001, the SLEEP instruction makes the MCU enter ADC
Noise Reduction mode, stopping the CPU but allowing the ADC, the external interrupts, 2-wire
Serial Interface address match, Timer/Counter2 and the Watchdog to continue operating (if
enabled). This sleep mode basically halts clkI/O, clkCPU, and clkFLASH, while allowing the
other clocks to run.
This improves the noise environment for the ADC, enabling higher resolution measurements. If
the ADC is enabled, a conversion starts automatically when this mode is entered. Apart form the
ADC Conversion Complete interrupt, only an External Reset, a Watchdog System Reset, a
Watchdog interrupt, a Brown-out Reset, a 2-wire serial interface interrupt, a Timer/Counter2
interrupt, an SPM/EEPROM ready interrupt, an external level interrupt on INT7:4 or a pin
change interrupt can wakeup the MCU from ADC Noise Reduction mode.
When the SM2:0 bits are written to 010, the SLEEP instruction makes the MCU enter Power-
down mode. In this mode, the external Oscillator is stopped, while the external interrupts, the 2-
wire Serial Interface, and the Watchdog continue operating (if enabled). Only an External Reset,
a Watchdog Reset, a Brown-out Reset, 2-wire Serial Interface address match, an external level
interrupt on INT7:4, an external interrupt on INT3:0, or a pin change interrupt can wake up the
MCU. This sleep mode basically halts all generated clocks, allowing operation of asynchronous
modules only.
Note that if a level triggered interrupt is used for wake-up from Power-down mode, the changed
level must be held for some time to wake up the MCU. Refer to
for details.
When waking up from Power-down mode, there is a delay from the wake-up condition occurs
until the wake-up becomes effective. This allows the clock to restart and become stable after
having been stopped. The wake-up period is defined by the same CKSEL Fuses that define the
Reset Time-out period, as described in
When the SM2:0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-
save mode. This mode is identical to Power-down, with one exception:
If Timer/Counter2 is enabled, it will keep running during sleep. The device can wake up from
either Timer Overflow or Output Compare event from Timer/Counter2 if the corresponding
Timer/Counter2 interrupt enable bits are set in TIMSK2, and the Global Interrupt Enable bit in
SREG is set. If Timer/Counter2 is not running, Power-down mode is recommended instead of
Power-save mode.
The Timer/Counter2 can be clocked both synchronously and asynchronously in Power-save
mode. If the Timer/Counter2 is not using the asynchronous clock, the Timer/Counter Oscillator is
ATmega640/1280/1281/2560/2561
“Clock Sources” on page
“External Interrupts” on page 112
41.
53

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