ATmega1280 Atmel Corporation, ATmega1280 Datasheet - Page 379

• Manufacturer Part Number: ATmega1280
• Manufacturer: Atmel Corporation

Specifications of ATmega1280

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 86
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 1
• Uart: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 16
• Input Capture Channels: 4
• Pwm Channels: 15
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 31-10. ADC Characteristics, Differential Channels (Continued)
Note:
31.9
Table 31-11. External Data Memory Characteristics, 4.5 to 5.5 Volts, No Wait-state
Notes:
2549N–AVR–05/11
0
1
2
3a
3b
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
AVCC
R
V
V
R
V
V
REF
DIFF
REF
AIN
INT
IN
Symbol
1/t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
LHLL
AVLL
LLAX_ST
LLAX_LD
AVLLC
AVRL
AVWL
LLWL
LLRL
DVRH
RLDV
RHDX
RLRH
DVWL
WHDX
DVWH
WLWH
Values are guidelines only.
External Data Memory Timing
1. This assumes 50% clock duty cycle. The half period is actually the high time of the external clock, XTAL1.
2. This assumes 50% clock duty cycle. The half period is actually the low time of the external clock, XTAL1.
CLCL
Parameter
Analog Supply Voltage
Reference Voltage
Input Voltage
Input Differential Voltage
ADC Conversion Output
Input Bandwidth
Internal Voltage Reference
Reference Input Resistance
Analog Input Resistance
Parameter
Oscillator Frequency
ALE Pulse Width
Address Valid A to ALE Low
Address Hold After ALE Low,
write access
Address Hold after ALE Low,
read access
Address Valid C to ALE Low
Address Valid to RD Low
Address Valid to WR Low
ALE Low to WR Low
ALE Low to RD Low
Data Setup to RD High
Read Low to Data Valid
Data Hold After RD High
RD Pulse Width
Data Setup to WR Low
Data Hold After WR High
Data Valid to WR High
WR Pulse Width
8MHz Oscillator
57.5
57.5
47.5
47.5
42.5
Min
115
115
115
115
115
125
115
40
5
5
0
ATmega640/1280/1281/2560/2561
Condition
Max
67.5
67.5
75
0.5t
0.5t
0.5t
0.5t
0.5t
1.0t
1.0t
1.0t
1.0t
1.0t
1.0t
-V
1.0t
V
CLCL
CLCL
CLCL
CLCL
CLCL
Min
REF
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CC
0.0
Min
GND
40
-511
5
5
0
2.7
2.3
CLCL
Variable Oscillator
- 0.3
/Gain
-15
-15
-20
-5
-5
-10
-10
-10
-10
-10
-10
(1)
(1)
(1)
(2)
(2)
(1)
Typ
2.56
100
32
4
(1)
0.5t
0.5t
1.0t
CLCL
CLCL
Max
AVCC - 0.5
CLCL
V
16
V
REF
Max
CC
+5
+5
V
511
2.8
-50
+ 0.3
CC
/Gain
(2)
(2)
(1)
Unit
Units
MHz
LSB
kHz
MΩ
kΩ
ns
V
V
379