SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 146
SAM9RL64
Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9RL64
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 146 of 903
- Download datasheet (13Mb)
21.4.2
Figure 21-2. EBI Connections to Memory Devices
21.5
21.5.1
21.6
6289D–ATARM–3-Oct-11
Product Dependencies
Functional Description
Connection Examples
I/O Lines
EBI
A1/NWR2/NBS2
NWR1/NBS1
NWR3/NBS3
NWR0/NWE
NCS1/SDCS
Figure 21-2
The pins used for interfacing the External Bus Interface may be multiplexed with the PIO lines.
The programmer must first program the PIO controller to assign the External Bus Interface pins
to their peripheral function. If I/O lines of the External Bus Interface are not used by the applica-
tion, they can be used for other purposes by the PIO Controller.
The EBI transfers data between the internal AHB Bus (handled by the Bus Matrix) and the exter-
nal memories or peripheral devices. It controls the waveforms and the parameters of the
external address, data and control buses and is composed of the following elements:
NRD/NOE
A0/NBS0
A16/BA0
A17/BA1
A18-A25
• the Static Memory Controller (SMC)
• the SDRAM Controller (SDRAMC)
D0-D31
A2-A15
SDCKE
SDA10
SDCK
SDWE
NCS2
NCS3
NCS4
NCS5
NCS0
RAS
CAS
shows an example of connections between the EBI and external devices.
A0/NWR0/NBS0
NRD/NOE
D0-D7
D16-D23
D0-D7
NBS0
SDWE
SDWE
NBS2
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
CS
OE
WE
128K x 8
SRAM
SDRAM
SDRAM
2M x 8
2M x 8
A0-A9, A11
A0-A9, A11
A0-A16
BA0
BA1
A10
BA0
BA1
A10
A2-A11, A13
SDA10
A16/BA0
A17/BA1
A2-A11, A13
SDA10
A16/BA0
A17/BA1
A1-A17
D8-D15
NWR1/NBS1
NRD/NOE
D24-D31
D8-D15
SDWE
SDWE
NBS3
NBS1
D0-D7
CS
OE
WE
128K x 8
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
D0-D7
SRAM
SDRAM
2M x 8
SDRAM
2M x 8
AT91SAM9R64/RL64
A0-A16
A0-A9, A11
A0-A9, A11
BA0
BA1
A10
BA0
BA1
A10
A2-A11, A13
SDA10
A16/BA0
A17/BA1
A1-A17
A2-A11, A13
SDA10
A16/BA0
A17/BA1
146
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