SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 610
SAM9RL64
Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9RL64
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 610 of 903
- Download datasheet (13Mb)
37.5.14
Name: DMAC_CTRLBx [x = 0..1]
Access: Read/Write
Reset Value: 0x00000000
• SIF
Source Interface Selection Field.
00: The source transfer is done via AHB-Lite Interface 0.
01: Reserved.
10: Reserved.
11: Reserved.
• DIF
Destination Interface Selection Field.
00: The destination transfer is done via AHB-Lite Interface 0.
01: Reserved.
10: Reserved.
11: Reserved.
• SRC_PIP
0: Picture-in-Picture mode is disabled. The source data area is contiguous.
1: Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is
automatically increment of a user defined amount.
• DST_PIP
0: Picture-in-Picture mode is disabled. The Destination data area is contiguous.
1: Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address
is automatically incremented by a user-defined amount.
• SRC_DSCR
0: Source address is updated when the descriptor is fetched from the memory.
1: Buffer Descriptor Fetch operation is disabled for the source.
6289D–ATARM–3-Oct-11
AUTO
31
23
15
–
–
7
–
DMAC Channel x [x = 0..1] Control B Register
30
22
14
–
–
–
6
–
29
21
13
–
5
DST_INCR
DIF
DST_DSCR
DST_PIP
28
20
12
4
27
19
11
–
–
–
3
–
AT91SAM9R64/RL64
26
18
10
–
–
–
2
–
25
17
–
9
–
1
SRC_INCR
SIF
SRC_DSCR
SRC_PIP
24
16
8
0
610
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