SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 738

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 41-4. Logical Address Space for DPR Access:
738
AT91SAM9R64/RL64
If a user tries to configure endpoints with a size the sum of which is greater than the DPRAM,
then the EPT_MAPD is not set.
The application has access to the physical block of DPR reserved for the endpoint through a
KB logical address space.
The physical block of DPR allocated for the endpoint is remapped all along the
address space. The application can write a
Configuration examples of UDPHS_EPTCTLx
endpoint type follow below.
• With DMA
• Without DMA:
+ NB_BANK_EPT1 x SIZE_EPT1
+ NB_BANK_EPT2 x SIZE_EPT2
+ NB_BANK_EPT3 x SIZE_EPT3
+ NB_BANK_EPT4 x SIZE_EPT4
+ NB_BANK_EPT5 x SIZE_EPT5
+ NB_BANK_EPT6 x SIZE_EPT6
+... (refer to
64 KB
EP0
64 KB
EP1
64 KB
EP2
64 KB
EP3
– AUTO_VALID: Automatically validate the packet and switch to the next bank.
– EPT_ENABL: Enable endpoint.
– TX_BK_RDY: An interrupt is generated after each transmission.
Logical address
...
8 to1024 B
8 to1024 B
8 to1024 B
8 to 64 B
8 to 64 B
8 to 64 B
...
...
41.5.16 UDPHS Endpoint Configuration
8 to1024 B
64
DPR
8 to1024 B
8 to 64 B
8 to1024 B
KB buffer linearly.
(UDPHS Endpoint Control
Register)
x banks
y banks
z banks
Register) for Bulk IN
6289D–ATARM–3-Oct-11
64
KB logical
64