PM5380-BI PMC-Sierra, Inc., PM5380-BI Datasheet - Page 110

• Manufacturer Part Number: PM5380-BI
• Description: Network Interface, SATURN User Network Interface (8x155) Telecom Standard Product
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
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Writing values into unused register bits has no effect. However, to ensure software compatibility with
future, feature-enhanced versions of the product, unused register bits must be written with logic zero.
Reading back unused bits can produce either a logic one or a logic zero; hence, unused register bits
should be masked off by software when read.
All configuration bits that can be written into can also be read back. This allows the processor
controlling the S/UNI-8x155 to determine the programming state of the block.
Writable normal mode register bits are cleared to logic zero upon reset unless otherwise noted.
Writing into read-only normal mode register bit locations does not affect S/UNI-8x155 operation unless
otherwise noted. Performance monitoring counter registers are a common exception.
Certain register bits are reserved. These bits are associated with megacell functions that are unused
in this application. To ensure that the S/UNI-8x155 operates as intended, reserved register bits must
be written with their default value as indicated by the register bit description.
Writing any data to the Master Reset and Identity register (0x001) simultaneously loads all the
performance monitoring registers in RSOP, RLOP, RPOP, SPTB, SSTB, RXCP, TXCP, RXFP, TXFP
and RAOP blocks in the device.
Writing to a channel’s Interrupt Status register (0x007, 0x107, 0x207 or 0x307) will simultaneously
load all the performance monitor registers in RSLOP, RLOP, RPOP, SPTB, SSTB, RXCP, TXCP,
RXFP and TXFP blocks in the channel.
Writing any data to the performance register in question may individually trigger the performance
registers in each block. In some cases, all performance registers in the block are loaded. In other
cases, only the specific register being written will load. See the register descriptions for the
performance register in question for more information.
S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
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