PM5380-BI PMC-Sierra, Inc., PM5380-BI Datasheet - Page 389

• Manufacturer Part Number: PM5380-BI
• Description: Network Interface, SATURN User Network Interface (8x155) Telecom Standard Product
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
13.7 Bit Error Rate Monitor
The bit error rate (BER) monitoring requirements are also slightly different between SONET
and SDH. An application note, PMC-950820, explains the different parameters in detail for the
RASE block.
The list below shows the various register setting to configure the S/UNI-8x155 for either
SONET or SDH operation.
Table 18 Settings for SONET or SDH Operation
Notes:
1.
2.
3.
4.
5.
The S/UN-8x155 provides two BERM blocks per channel. One can be dedicated to monitor at
the Signal Degrade (SD) error rate and the other dedicated to monitor at the Signal Fail (SF)
error rate for the channel.
The Bit Error Rate Monitor (BERM) block counts and monitor line BIP errors over
programmable periods of time (window size). It can monitor to declare an alarm or to clear it if
the alarm is already set. A different threshold and accumulation period must be used to declare
or clear the alarm, whether or not those two operations are not performed at the same BER. The
following table list the recommended content of the BERM registers for different error rates
(BER). Both BERMs in the TSB are equivalent and are programmed similarly. In a normal
application they will be set to monitor different BER.
When the SF/SD CMODE bit is set to one, the clearing monitoring is recommended to be
performed using a window size that is 8 times longer than the declaration window size. When
the SF/SD CMODE bit is set to zero, the clearing monitoring is recommended to be performed
using a window size equal to the declaration window size. In all cases, the clearing threshold is
calculated for a BER that is 10 times lower than the declaration BER, as required in the
references. The table indicates the declare BER and evaluation period only.
SONET requires Z0 bytes to be set to the number corresponding to the STS-1 column number. SDH
consider those bytes reserved.
When forcing a constant Z0 pattern (SDH_J0/ZO is high), the Z0 bytes must be DC balanced
(approximately the same number of ones and zeros) as the bytes are not scrambled. Failure to do so
may cause downstream clock recovery to lose lock.
SONET uses 64 byte trace messages while SDH used 16 byte trace messages.
SDH specification requires the detector of SS bits to be “10”.
The SS bits are undefined for SONET, but must be set to “10” for SDH.
Configuration Registers
SDH_J0/Z0 (register offset 0x004)
ENSS (register offset 0x03D)
Path LEN16 (register offset 0x028)
Section LEN16 (register offset 0x050)
S[1:0] (register offset 0x46)
S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
SONET
0
0
0
0
00
SDH
X
1
1
1
10
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