PM5380-BI PMC-Sierra, Inc., PM5380-BI Datasheet - Page 359
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PM5380-BI
Manufacturer Part Number
PM5380-BI
Description
Network Interface, SATURN User Network Interface (8x155) Telecom Standard Product
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM5380-BI.pdf
(440 pages)
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Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
Register 0x1140, 0x114C, 0x1158, 0x1164, 0x1170, 0x117C, 0x1188, 0x1194:
These STAL blocks perform the pointer processing required for the transmit APS interface for
each channel. The other STAL blocks are slaved to these STAL blocks.
IPAIS:
OPJEE:
ESEE:
H4BYP:
STAL Channel #0 to #7 Configuration
The insert path AIS bits controls the insertion of Path AIS in the transmit APS stream.
When IPAIS is set high, path AIS is inserted in the outgoing bus. The pointer bytes (H1,
H2, and H3) and the entire synchronous payload envelop (virtual container) is set to all
ones. Normal operation resumes when the IPAIS bit is set low.
The transmit APS stream pointer justification event interrupt enable bit (OPJEE) controls
the activation of the interrupt output when a pointer justification is inserted in the APS
stream. When OPJEE is set high, insertion of pointer justification events in the transmit
APS stream will assert the INTB output. When OPJEE is set low, insertion of pointer
justification events will not affect INTB.
The elastic store error interrupt enable bit (ESEE) controls the assertion of INTB when a
FIFO underflow or overflow has been detected in the elastic store . When ESEE is set high,
FIFO flow error events will assert the INTB output. When ESEE is set low, FIFO flow
error events will not affect INTB.
The tributary multiframe bypass bit (H4BYP) controls whether the H4 byte in the path
overhead is over-written by an internally generated sequence. When H4BYP is set high, the
H4 byte carried in the incoming stream is placed in the outgoing stream unchanged. When
H4BYP is set low, the H4 byte is replaced by the sequence 'hFC, 'hFD, 'hFE and 'hFF. The
phase of the four frames in the multiframe is synchronized by the IV1 pulse.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Reserved
H4BYP
Reserved
Unused
Reserved
ESEE
OPJEE
IPAIS
S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Default
0
0
0
X
0
0
0
0
Released
359
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