PM5380-BI PMC-Sierra, Inc., PM5380-BI Datasheet - Page 318
PM5380-BI
Manufacturer Part Number
PM5380-BI
Description
Network Interface, SATURN User Network Interface (8x155) Telecom Standard Product
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM5380-BI.pdf
(440 pages)
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Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
Register 0x1015: TUL3 POS Level 3 FIFO Low Water Mark
LWM[5:0]:
The LWM[5:0] bits determine the channel FIFO depth at which PTPA and STPA assert in
POS-PHY Level 3 operation. FIFO fill level control may be important when the layer
device latency is large.
When the channel FIFO empties to the specified depth, the transmit packet available signals
PTPA and STPA are asserted. PTPA and STPA are deasserted based on the FIFO level
specified by HWM[5:0]. Together with HWM[5:0], LWM[5:0] provides hysteresis in the
toggling of the transmit packet available signal.
LWM[5:0] specifies the FIFO level in the number of double-words (4 bytes). Therefore, the
low water mark may be configured from 0 bytes to 255 bytes. For proper operation, the
high water mark level must be greater than the low water mark level.
Note that when sending ATM cells over the POS-PHY Level 3 interface, HWM[5:0]
together with LWM[5:0] do not directly translate to the number of writeable locations in the
FIFO as the ATM cells are internally stored as 64 byte entities in the FIFO. For proper
operation when sending ATM cells over the POS-PHY Level 3 interface, LWM[5:0] must
be configured to at least 52 or 56 bytes, as specified by CELLFORM. Failure to do this will
result in a FIFO deadlock with a partial cell stuck in the FIFO and PTPA and STPA
deasserted.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Reserved
Reserved
LWM[5]
LWM[4]
LWM[3]
LWM[2]
LWM[1]
LWM[0]
S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Default
0
0
0
0
0
1
0
0
Released
318
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