PM5380-BI PMC-Sierra, Inc., PM5380-BI Datasheet - Page 307

• Manufacturer Part Number: PM5380-BI
• Description: Network Interface, SATURN User Network Interface (8x155) Telecom Standard Product
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
Register 0x1005: APS FIFO Configuration and Status
This register reports the status of the RAPS 16-byte APS FIFO between the APS serial data
recovery block and the APS framer (SIPO) which handles low frequency wander of the APS
serial links.When the interrupt output INTB goes low, this register allows the source of the
active interrupt to be identified down to the block level for the APS interfaces. Further register
accesses are required for the block in question to determine the cause of an active interrupt and
to acknowledge the interrupt source.
FERRI[1:0]:
FRST[1:0]:
Reserved:
The FERRI[x] bit is high when an interrupt request is active from a given APS channel
FIFO logic. The APS FIFO interrupt sources are enabled in the APS Configuration and
Status register.
The FIFO reset registers (FRST[1:0]) are used to reset the 16-byte APS FIFOs. When a
FRST[x] bit is set high, the corresponding APS FIFO is held in reset. While in reset data
may pass through, however there will be data corruption if a small amount of jitter is
applied at the APS input.The FIFO is held in reset until the FRST[x] is set low.
When the FIFO reset, the FIFO initialized such that the FIFO is centered (that is, the fill
level of the FIFO is 8 bytes).
The reserved bits must be programmed to ‘1’ for proper operation.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R
R
Function
Reserved
Reserved
FRST[1]
FRST[0]
Unused
Unused
FERRI[1]
FERRI[0]
S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Default
0
0
0
0
X
X
Released
307