PM5364 pmc-sierra, PM5364 Datasheet - Page 114

• Manufacturer Part Number: PM5364
• Description: Tupp 2488 Assp Telecom Standard
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
By way of clarification, please note that there are no TIM or TIU defect processing standards at
the tributary level—they are just defined for the path or higher level. For example,
GR-253-2000 states on pages 6-39, “At this time, TIM defects and failures have been defined in
SONET only for STS paths; however, they could be defined for VT paths (or possibly at the
Section layer) in the future.” Consequently, the standards defined at the path and/or section level
have been borrowed to define TIM and TIU processing at the tributary level.
Algorithm 1 – TELCORDIA and ANSI Compliant (Typically SONET)
This algorithm captures, synchronizes, and validates the tributary trace message. The current
tributary trace message is stored in the captured page. The received message can be configured
to synchronize when receiving either a byte with its Most Significant Bit (MSB) high, or on the
Carriage-Return/Linefeed (CR=0DH, LF=0AH) ASCII characters of the message. If the
RTTB336 synchronizes to the MSB of the message (i.e., the TFAS), the byte with its MSB set
high is placed in the first location (position 0) of the captured page. If the RTTB336
synchronizes on the CR/LF characters of the message, the LF byte is placed at the last location
of the message (position 15 or 63), and the following byte is placed at the first location (position
0) of the captured page.
A trace identifier mismatch (TIM) is declared when none of the last 20 messages match the
expected message. A TIM is removed when 16 or more of the last 20 messages match the
expected message. When the ZEROPGEN register bit is asserted, all zeros messages are given
special consideration: TIM is declared when none of the last 20 messages either are all zeros or
match the expected message; TIM is deasserted when 16 or more of the last 20 messages (a) are
all zeros, (b) match the expected message, or are some mixture of (a) and (b). An interrupt is
optionally generated upon a change in the TIM state. The expected tributary trace message is a
static message written in the expected page by an external microprocessor.
The accepted page provides a debounced version of the captured message. A tributary trace
message is placed in the accepted page when the identical message is received for 3 or 5
consecutive multiframes, as configured by the PER5 register bit. When the NOSYNC register
bit is logic 0, a tributary trace message can only be declared persistent if it is appropriately
synchronized via CR/LF characters or the TFAS. When the NOSYNC register bit is logic 1,
tributary trace messages without synchronization can be declared persistent. In the special case
where NOSYNC is logic 0 and ZEROPGEN is logic 1, all zeros messages can be declared
persistent.
Algorithm 2 – ITU-T Compliant (Typically SDH)
This algorithm captures, synchronizes, monitors persistency, monitors stability and validates the
trail trace identifier. The current received trail trace identifier is stored in the captured page. The
received identifier can be configured to synchronize when receiving either a byte with its MSB
high, or on the CR/LF ASCII characters of the identifier. If the RTTB336 synchronizes on the
MSB of the identifier (i.e., the TFAS), the byte with its MSB high is placed in the first location
(position 0) of the captured page. If the RTTB336 synchronizes on the CR/LF characters of the
identifier, the LF byte is placed at the last location of the identifier (position 15 or 63), and the
following byte is placed in the first location (position 0) of the captured page.
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
Released
114