PM5364 pmc-sierra, PM5364 Datasheet - Page 279

• Manufacturer Part Number: PM5364
• Description: Tupp 2488 Assp Telecom Standard
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
(CSB+RDB)
Figure 89 Microprocessor Interface Read Timing
Notes
1.
2.
3.
4.
5.
6.
7.
D[15:0
]
A[14:0]
INTB
ALE
Output propagation delay time is the time in nanoseconds from the 1.4 Volt point of the reference
signal to the 1.4 Volt point of the output
Maximum output propagation delays are measured with a 100 pF load on the Microprocessor
Interface data bus, (D[15:0])
A valid read cycle is defined as a logical OR of the CSB and the RDB signals
In non-multiplexed address/data bus architectures, ALE should be held high so parameters tSALR,
tHALR, tVL, and tSLR are not applicable
Parameter tHAR and tSAR is not applicable if address latching is used
When a set-up time is specified between an input and a clock, the set-up time is the time in
nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point of the clock
When a hold time is specified between an input and a clock, the hold time is the time in nanoseconds
from the 1.4 Volt point of the input to the 1.4 Volt point of the clock
tS AL
tS AR
tV L
Valid
tS
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
LR
tP R
Address
tH AL
Valid Data
tZ R
tZ INT
tH
AR
tH LR
Released
279