PM5364 pmc-sierra, PM5364 Datasheet - Page 228
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PM5364
Manufacturer Part Number
PM5364
Description
Tupp 2488 Assp Telecom Standard
Manufacturer
pmc-sierra
Datasheet
1.PM5364.pdf
(306 pages)
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13.13.1
13.13.2
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
11. Configure the device once lock has been achieved.
The CENTER circuitry in the timing and MUX FIFOs may lock up when the device is reset.
Center the timing and MUX FIFO’s by writing a logic 1 to the Lx_CENTER_MUXTX and
Lx_CENTER_TIMTX bits of the CML Tx Slice Config Register and then read the bits after the
first device centering operation to ensure they are not set to ‘1’. If one or more of these bits are
set to ‘1’, write the bits to a logic ‘0’ to remove the lockup condition. Checking for the lockup
condition is only necessary after the first centering operation.
Configuration of the RSEF
Once the RSEF has been brought out of reset, all interrupts within the block are masked by
default. Since the initial RSEF input data is not character aligned, it is recommended that the
LCVI and BIP8I interrupts remain masked until character alignment has been achieved.
With a valid bit stream, character alignment will occur after one frame and frame alignment
after two frames. In 8B/10B mode, if an LCV occurs after character alignment and before frame
alignment, then frame alignment is delayed by CLEAN_FRM_CNT frames. Setting
CLEAN_FRM_CNT to 0 (its default) disables this feature. Setting this value to 3 is
recommended and makes the framing algorithm more robust against false frame when a link is
floating.
By default, the RSEF will go out of character alignment if the number of LCVs in a
15-character window exceeds four. This can be changed by setting the LCV_OOF_ERROR
threshold through the MPIF. Setting LCV_OOF_ERROR to 0 provides immunity to a possible
false framing pattern such as a single K28.5 character followed and entire frame of AIS
characters and is the recommended setting. The higher this value, the more tolerant the RSEF is
of LCVs without losing character alignment.
TILC and RILC Operation
The TILC and RILC implement the Transmit and Receive functions of the ILC (Inband Link
Controller). They transmit and receive inband commands and control information between
serial links. These sit only on the system side CML of TUPP 2488.
o Configure the receive 8B/10B decoding option, 622NRZ mode and de-scrambling
o Configure the transmit 8B/10B encoding option, A1A2 insertion, B1 re-calculation and
o Center all the transmit TIM FIFOs and MUX FIFOs (2488 mode only).
mode.
scrambling mode.
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
Released
228
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