PM5364 pmc-sierra, PM5364 Datasheet - Page 238

• Manufacturer Part Number: PM5364
• Description: Tupp 2488 Assp Telecom Standard
• Manufacturer: pmc-sierra

13.21 DLL Operation and Recovering from Clock Failure
13.22 JTAG Support
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
When the DLL comes out of reset its EXTEND bit should be set to ‘1’ to enable the DLL to
operate at 77.76 MHz. When the DLL achieves zero phase offset between the REFCLK pin and
the internal device REFCLK it asserts the RUN bit in the DLL status register 0123h.
The DLL can be bypassed using the OVERRIDE bit, or force a phase offset using the
VERN_EN and VERNIER bits.
If the DLL is unable to achieve phase lock on the REFCLK and core REFCLK signals it asserts
the ERRORI interrupt.
If the phase offset changes the CHANGEI interrupt is asserted.
The TUPP2488 has limited capability to detect REFCLK clock failures. When the REFCLK
input is disabled and the serial line side is configured for 2.488 Gbit/s operation, the transmit
DMUX FIFO’s will report a FIFO error. Re-centering of the FIFO is required to resume
normal operation. The DLL REFCLKI bit can be used to monitor activity, check the bit
periodically to ensure REFCLK is active.
Correct operation of the devices requires the REFCLK device input to operate at the specified
frequency. The DLL will report an ERRORI interrupt if the REFCLK frequency is significantly
less than or greater than the recommended frequency. Internal timing paths within the device
will fail under such circumstances and device behavior is not guaranteed. Soft or hard reset of
the device is required to resume normal operation.
The TUPP 2488 supports the IEEE Boundary Scan Specification as described in the IEEE
1149.1 standards. The Test Access Port (TAP) consists of the five standard pins, TRSTB, TCK,
TMS, TDI and TDO used to control the TAP controller and the boundary scan registers. The
TRSTB input is the active-low reset signal used to reset the TAP controller. TCK is the test
clock used to sample data on input, TDI and to output data on output, TDO. The TMS input is
used to direct the TAP controller through its states. The basic boundary scan architecture is
shown in Figure 63.
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
Released
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