PM5364 pmc-sierra, PM5364 Datasheet - Page 243

• Manufacturer Part Number: PM5364
• Description: Tupp 2488 Assp Telecom Standard
• Manufacturer: pmc-sierra

13.22.4
13.23 Performance Monitor Clock
13.24 Unreliable Interrupt Indications in VTPA
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
Limitation
The LEWORK_P/N [4:1], LEPROT_P/N [4:1], SIWORK_P/N [8:1] and SIPROT_P/N [8:1]
pins on the TUPP 2488 device are not fully compliant with IEEE 1149.1 JTAG. These pins
respond correctly to the JTAG EXTEST instruction, but do not respond correctly to the
SAMPLE and BYPASS instructions. During the SAMPLE and BYPASS instructions, these
pins are driven by the JTAG controller with a steady state value. According to the JTAG
standard, the correct behavior during SAMPLE and BYPASS instructions is to allow normal
data activity to continue on the pin.
All other high speed receivers LIWORK_P/N [4:1], LIPROT_P/N [4:1], SEWORK_P/N [8:1]
and SEPROT_P/N [8:1]) and low speed I/Os are fully compliant with the IEEE 1149.1 standard
and support all relevant test and debug operations.
The performance monitor clock is used to transfer the content of the performance counters and
then reset the counters. It is recommended to assert performance clock for one second, but it is
not required. The RHPP_R, SHPI, SVCA, VTPI, RTOP and VTPA functional blocks prefer one
second of clock period to accumulate various events. The RSEF and PIPM blocks do not have
preference.
There are three ways to assert LCLK in TUPP2488:
Internally generated one-second performance monitor clock
Software controllable performance monitor clock
External performance monitor clock using LCLK pin
When configured to process TU3 payload, some VTPA interrupt bits are unreliable if the
automatic PMON transfer features are used.
The affected VTPA interrupt bits include:
ESEI - This bit indicates if an Elastic Storage Error (ESE) event has occurred.
PJEI - This bit indicates if a positive pointer movement has occurred
NJEI - This bit indicates if a negative pointer movement has occurred
o Set LCLK_SRC bit to logic ‘0’.
o Set LCLK_SRC bit to ‘1’ and assert LCLK pin to ‘0’.
o Toggle LCLK_VAL bit.
o Set LCLK_SRC bit to logic ‘1’ and LCLK_VAL bit to logic ‘0’.
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
Released
243