mt46h32m32lfcm-6 Micron Semiconductor Products, mt46h32m32lfcm-6 Datasheet - Page 24

• Manufacturer Part Number: mt46h32m32lfcm-6
• Description: 1gb X16, X32 Mobile Ddr Sdram
• Manufacturer: Micron Semiconductor Products

PDF: 09005aef82ce3074/Source: 09005aef82cd0158
1gb_ddr_mobile_sdram_t48m_density__2.fm - Rev. G 07/08 EN
21. READs and WRITEs with auto precharge must not be issued until
22. The refresh period equals 64ms. This equates to an average refresh rate of 7.8125µs.
23. This is not a device limit. The device will operate with a negative value, but system perfor-
24. It is recommended that DQS be valid (HIGH or LOW) on or before the WRITE command. The
25. The maximum limit for this parameter is not a device limit. The device will operate with a
26. At least one clock cycle is required during
27. Clock must be toggled a minimum of two times during the
prior to the internal PRECHARGE command being issued.
mance could be degraded due to bus turnaround.
case shown (DQS going from High-Z to logic LOW) applies when no WRITEs were previously
in progress on the bus. If a previous WRITE was in progress, DQS could be HIGH during this
time, depending on
greater value for this parameter, but system performance (bus turnaround) will degrade
accordingly.
t
DQSS.
24
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
WR time when in auto precharge mode.
1Gb: x16, x32 Mobile DDR SDRAM
Electrical Specifications
t
XSR period.
©2007 Micron Technology, Inc. All rights reserved
t
RAS (MIN) can be satisfied