mt46h32m32lfcm-6 Micron Semiconductor Products, mt46h32m32lfcm-6 Datasheet - Page 82

• Manufacturer Part Number: mt46h32m32lfcm-6
• Description: 1gb X16, X32 Mobile Ddr Sdram
• Manufacturer: Micron Semiconductor Products

Figure 50:
Deep Power-Down (DPD)
PDF: 09005aef82ce3074/Source: 09005aef82cd0158
ddr_mobile_sdram_cmd_op_timing_dia_fr5.08__3.fm - Rev. G 07/08 EN
Command
Address
DQS
CK#
CKE
DM
DQ
CK
Power-Down Mode (Active or Precharge)
No READ/WRITE
access in progress
Notes:
t
t
t
IS
IS
IS
Valid
Valid
T0
t
t
t
IH
1
IH
IH
1. If this command is a PRECHARGE (or if the device is already in the idle state), then the
2. No column accesses can be in progress when power-down is entered.
3.
Deep power-down is an operating mode used to achieve maximum power reduction by
eliminating the power of the memory array. Data will not be retained after the device
enters DPD mode.
Before entering DPD mode the DRAM must be in all banks idle state with no activity on
the data bus (
with RAS# and CAS# HIGH at the rising edge of the clock while CKE is LOW. CKE must be
held LOW to maintain DPD mode. The clock must be stable prior to exiting DPD mode.
This mode is exited by asserting CKE HIGH with either a NOP or DESELECT command
present on the command bus. Upon exiting DPD mode, a full DRAM initialization
sequence is required.
t
CK
power-down mode shown is precharge power-down. If this command is an ACTIVE (or if at
least one row is already active), then the power-down mode shown is active power-down.
t
HIGH at Ta2 (exit power-down).
CKE applies if CKE goes LOW at Ta2 (entering power-down);
power-down
t
IS
Enter
mode
NOP
T1
2
t
CH
t
RP time must be met). This mode is entered by holding CS# and WE# LOW
Must not exceed refresh device limits
t
CL
T2
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t
CKE
82
Ta0
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1Gb: x16, x32 Mobile DDR SDRAM
power-down
mode
NOP
Ta1
Exit
t
t
CKE
XP
3
3
t
XP applies if CKE remains
Valid
Valid
Ta2
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Timing Diagrams
Don’t Care
Tb1