mt46h32m32lfcm-6 Micron Semiconductor Products, mt46h32m32lfcm-6 Datasheet - Page 5

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mt46h32m32lfcm-6

Manufacturer Part Number
mt46h32m32lfcm-6
Description
1gb X16, X32 Mobile Ddr Sdram
Manufacturer
Micron Semiconductor Products
Datasheet

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Figure 1:
FBGA Part Marking Decoder
General Description
PDF: 09005aef82ce3074/Source: 09005aef82cd0158
1gb_ddr_mobile_sdram_t48m_density__2.fm - Rev. G 07/08 EN
Micron Technology
Product family
46 = Mobile DDR SDRAM
Operating voltage
H = 1.8/1.8V
Configuration
64 Meg x 16
32 Meg x 32
Addressing
LF = Mobile standard addressing
LG = Reduced page-size option
Package codes
CK = 10mm x 11.5mm VFBGA “green”
CM = 10mm x 13mm VFBGA “green”
1Gb Mobile DDR Part Numbering
Notes:
1. Throughout this data sheet, the various figures and text refer to DQs as “DQ.” The DQ
2. Complete functionality is described throughout the document; any page or diagram
3. Any specific requirement takes precedence over a general statement.
Due to space limitations, FBGA-packaged components have an abbreviated part
marking that is different from the part number. Micron’s FBGA Part Marking Decoder is
available at www.micron.com/decoder.
The 1Gb Mobile DDR SDRAM is a high-speed CMOS, dynamic random-access memory
containing 1,073,741,824 bits. It is internally configured as a quad-bank DRAM. Each of
the x16’s 268,435,456-bit banks is organized as 16,384 rows by 1,024 columns by 16 bits.
Each of the x32’s 268,435,456-bit banks is organized as 8,192 rows by 1,024 columns by
32 bits. In the reduced page-size (LG) option, each of the x32’s 268,435,456-bit banks are
organized as 16,384 rows by 512 columns by 32 bits.
term is to be interpreted as any and all DQ collectively, unless specifically stated
otherwise. Additionally, the x16 is divided into two bytes: the lower byte and the upper
byte. For the lower byte (DQ[7:0]), DM refers to LDM and DQS refers to LDQS. For the
upper byte (DQ[15:8]), DM refers to UDM and DQS refers to UDQS. The x32 is divided
into four bytes. For DQ[7:0], DM refers to DM0 and DQS refers to DQS0. For DQ[15:8],
DM refers to DM1 and DQS refers to DQS1. For DQ[23:16], DM refers to DM2 and
DQS refers to DQS2. For DQ[31:24], DM refers to DM3 and DQS refers to DQS3.
may have been simplified to convey a topic and may not be inclusive of all require-
ments.
MT 46
H
64M16 LF CK -6
5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
L IT
1Gb: x16, x32 Mobile DDR SDRAM
:A
FBGA Part Marking Decoder
Design revision
:A = First generation
Operating temperature
Blank = Commercial (0°C to +70°C)
IT = Industrial (–40°C to +85°C)
Power
Blank = Standard I
L = Low Power I
Cycle time
-5 = 5ns
-54 = 5.4ns
-6 = 6ns
-75 = 7.5ns
t
t
CK CL = 3
CK CL = 3
t
t
©2007 Micron Technology, Inc. All rights reserved
CK CL = 3
CK CL = 3
DD
DD
2/I
2/I
DD
DD
6
6

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