tmp86fh46bng TOSHIBA Semiconductor CORPORATION, tmp86fh46bng Datasheet - Page 117

• Manufacturer Part Number: tmp86fh46bng
• Description: 8 Bit Microcontroller Tlcs-870/c Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Example :After checking low-frequency clock oscillation stability with TC4 and 3, switching to the SLOW1 mode
9.3.9
9.3.9.1
PINTTC4:
VINTTC4:
is switched between the high-frequency and low-frequency. The timer counter 3 and 4 are cascadable to
form a 16-bit TimerCounter. The warm-up counter mode has two types of mode; switching from the high-fre-
quency to low-frequency, and vice-versa.
Warm-Up Counter Mode
Note 1: In the warm-up counter mode, fix TCiCR<TFFi> to 0. If not fixed, the PDOi, PWMi and PPGi pins may out-
Note 2: In the warm-up counter mode, only upper 8 bits of the timer register TTREG4 and 3 are used for match de-
Note 3: i = 3, 4
Table 9-8 Setting Time of Low-Frequency Warm-Up Counter Mode (fs = 32.768 kHz)
In this mode, the warm-up period time is obtained to assure oscillation stability when the system clocking
is obtained. Before starting the timer, set SYSCR2<XTEN> to 1 to oscillate the low-frequency clock.
When a match between the up-counter and the timer register (TTREG4, 3) value is detected after the tim-
er is started by setting TC4CR<TC4S> to 1, the counter is cleared by generating the INTTC4 interrupt re-
quest. After stopping the timer in the INTTC4 interrupt service routine, set SYSCR2<SYSCK> to 1 to
switch the system clock from the high-frequency to low-frequency, and then clear of SYSCR2<XEN> to
0 to stop the high-frequency clock.
(NORMAL1 → NORMAL2 → SLOW2 → SLOW1)
In this mode, the warm-up period time from a stop of the low-frequency clock fs to oscillation stability
Low-Frequency Warm-up Counter Mode
put pulses.
tection and lower 8 bits are not used.
SET
LD
LD
LDW
DI
SET
EI
SET
:
CLR
SET
CLR
RETI
:
DW
Minimum Time Setting
(TTREG4, 3 = 0100H)
7.81 ms
(SYSCR2).6
(TC3CR), 43H
(TC4CR), 05H
(TTREG3), 8000H
(EIRH). 1
(TC4CR).3
:
(TC4CR).3
(SYSCR2).5
(SYSCR2).7
:
PINTTC4
; SYSCR2<XTEN> ← 1
; Sets TFF3=0, source clock fs, and 16-bit mode.
; Sets TFF4=0, and warm-up counter mode.
; Sets the warm-up time.
; (The warm-up time depends on the oscillator characteristic.)
; IMF ← 0
; Enables the INTTC4.
; IMF ← 1
; Starts TC4 and 3.
; Stops TC4 and 3.
; SYSCR2<SYSCK> ← 1
; (Switches the system clock to the low-frequency clock.)
; SYSCR2<XEN> ← 0 (Stops the high-frequency clock.)
; INTTC4 vector table
Page 99
Maximum Time Setting
(TTREG4, 3 = FF00H)
1.99 s
TMP86FH46BNG