tmp86fh46bng TOSHIBA Semiconductor CORPORATION, tmp86fh46bng Datasheet - Page 182

• Manufacturer Part Number: tmp86fh46bng
• Description: 8 Bit Microcontroller Tlcs-870/c Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

15.6
Operation Mode
Note 7: If the security program is enabled or a password error occurs, TMP86FH46BNG stops UART communication and en-
Note 8: If an error occurs during the reception of a password address or a password string, TMP86FH46BNG stops UART com-
Note 9: To rewrite data to Flash memory addresses at which data (including FFH) is already written, make sure to erase the ex-
Description of RAM loader mode
ters the halt condition. In this case, initialize TMP86FH46BNG by the RESET pin and reactivate the serial PROM mode.
munication and enters the halt condition. In this case, initialize TMP86FH46BNG by the RESET pin and reactivate
the serial PROM mode.
isting data by "sector erase" or "chip erase" before rewriting data.
1. The 1st through 4th bytes of the transmitted and received data contains the same data as in the
2. In the 5th byte of the received data contains the RAM loader command data (60H).
3. When the 5th byte of the received data contains the operation command data shown in Table 15-6,
4. The 7th through m’th bytes of the transmitted and received data contain the same data as in the
5. The m’th + 1 through n’th - 2 bytes of the received data contain the binary data in the Intel Hex for-
6. The n’th - 1 and n’th bytes contain the checksum upper and lower bytes. For details on how to calcu-
7. After transmitting the checksum to the external controller, the boot program jumps to the RAM ad-
flash memory writing mode.
the device echoes back the value which is the same data in the 6th byte position (in this case,
60H). If the 5th byte does not contain the operation command data, the device enters the halt condi-
tion after sending 3 bytes of operation command error code (63H).
flash memory writing mode.
mat. No received data is echoed back to the external controller. After receiving the start mark
(3AH for “:”) in the Intel Hex format, the device starts data record reception. Therefore, the re-
ceived data except 3AH is ignored until the start mark is received. After receiving the start mark,
the device receives the data record, that consists of data length, address, record type, write data and
checksum. The writing data of the data record is written into RAM specified by address. Since the de-
vice starts checksum calculation after receiving an end record, the external controller should wait
for the checksum after sending the end record. If a receiving error or Intel Hex format error occurs,
the device enters the halts condition without returning an error code to the external controller.
late the SUM, refer to "15.8 Checksum (SUM)". The checksum is calculated only when the end re-
cord is detected and no receiving error or Intel Hex format error occurs. After sending the end re-
cord, the external controller judges whether the transmission is completed correctly by receiving
the checksum sent by the device.
dress that is specified by the first received data record.
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TMP86FH46BNG