tmp86fh46bng TOSHIBA Semiconductor CORPORATION, tmp86fh46bng Datasheet - Page 77

• Manufacturer Part Number: tmp86fh46bng
• Description: 8 Bit Microcontroller Tlcs-870/c Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

7. I/O Ports
nal input data should be externally held until the input data is read from outside or reading should be performed sev-
eral timer before processing. Figure 7-1 shows input/output timing examples.
This timing cannot be recognized from outside, so that transient input such as chattering must be processed by the
program.
O port.
The TMP86FH46BNG have 5 parallel input/output ports (33 pins) as follows.
Each output port contains a latch, which holds the output data. All input ports do not have latches, so the exter-
External data is read from an I/O port in the S1 state of the read cycle during execution of the read instruction.
Output data changes in the S2 state of the write cycle during execution of the instruction which writes to an I/
Note:The positions of the read and write cycles may vary, depending on the instruction.
Port P0
Port P1
Port P2
Port P3
Port P4
Instruction execution cycle
Instruction execution cycle
8-bit I/O port
6-bit I/O port
3-bit I/O port
8-bit I/O port
8-bit I/O port
Output strobe
Primary Function
Data output
Input strobe
Data input
Figure 7-1 Input/Output Timing (Example)
External interrupt input, Serial PROM mode control input, serial and timer/coun-
ter input/output.
External interrupt input, and timer/counter input/output.
Low-frequency resonator connections, external interrupt input, and STOP mode re-
lease signal input.
Analog input, and STOP mode release signal input.
S0 S1 S2 S3 S0 S1 S2 S3 S0 S1 S2 S3
S0 S1 S2 S3 S0 S1 S2 S3 S0 S1 S2 S3
Fetch cycle
Fetch cycle
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Ex: LD A, (x)
Ex: LD (x), A
(b) Output timing
(a) Input timing
Fetch cycle
Fetch cycle
Secondary Functions
Old
Read cycle
Write cycle
New
TMP86FH46BNG