tmp86fh46bng TOSHIBA Semiconductor CORPORATION, tmp86fh46bng Datasheet - Page 81

• Manufacturer Part Number: tmp86fh46bng
• Description: 8 Bit Microcontroller Tlcs-870/c Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

7.4
(0003H)
(000EH)
ware control. Port P3 is also used as an analog input, key on wake up input. Input/output mode is specified by the
corresponding bit in the port P3 input/output control register (P3CR), and ADCCR1<AINDS>. During reset,
P3CR are initialized to “0” and ADCCR1<AINDS> is set to “1”, therefore port P3 is configured as an input.
to “0”. When ADCCR1<AINDS> is “0”, the pin which is specified as an analog input is used as analog input inde-
pendent on the value of P3CR and P3DR.
ifying as an analog input.
input is read “0”. and the data of port which is not selected as an analog input is read “0” or “1”, depend on the volt-
age level.
put. Data can be written into the output latch regardless of P3CR contents, therefore initial output data should be writ-
ten into the output latch before setting P3CR.
cuted to keep a precision. In addition, a variable signal should not be input to an adjacent port to the analog input
during AD conversion.
P3DR
P3CR
R/W
Port P3 (P37 to P30)
Port P3 is an 8-bit input/output port which can be configured as an input or an output in one-bit unit under soft-
When used as an analog input, set an analog input channel to ADCCR1<SAIN> and clear ADCCR1<AINDS>
When used as an input port or key on wake up input, the corresponding bit of P3CR is cleared to “0” without spec-
When the AD converter is enabled (ADCCR1<AINDS> is “0”), the data of port which is selected as an analog
When used as an output port, the corresponding bit of P3CR is set to “1” without specifying as an analog in-
The pins not used as analog input can be used as an input/output port. But output instructions should not be exe-
STOP5
AIN7
P37
P3CR
7
7
STOP4
AIN6
P36
Data output (P3DR)
6
6
Data input (P3DR)
I/O control
(Specified for each bit)
Key on wake up
Analog input
P3CRi input
STOP3
AIN5
P35
5
5
OUTEN
AINDS
STOPj
P3CRi
STOP
SAIN
STOP2
AIN4
P34
4
4
Output latch
Output latch
Figure 7-5 Port P3
D
D
AIN3
P33
0: Input mode
1: Output mode
3
3
Q
Q
Page 63
AIN2
P32
2
2
AIN1
P31
1
1
AIN0
P30
0
0
Note: i = 7 to 0
(Initial value: 0000 0000)
(Initial value: 0000 0000)
j = 5 to 2
P3i
TMP86FH46BNG
R/W