tmp86fh46bng TOSHIBA Semiconductor CORPORATION, tmp86fh46bng Datasheet - Page 142

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tmp86fh46bng

Manufacturer Part Number
tmp86fh46bng
Description
8 Bit Microcontroller Tlcs-870/c Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
TMP86FH46BNG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
11.4
Transfer Rate
11.4
11.5
fer rate are determined as follows:
ted in RXD pin input. RT clock starts detecting “L” level of the RXD pin. Once a start bit is detected, the start
bit, data bits, stop bit(s), and parity bit are sampled at three times of RT7, RT8, and RT9 during one receiver
clock interval (RT clock). (RT0 is the position where the bit supposedly starts.) Bit is determined according to ma-
jority rule (The data are the same twice or more out of three samplings).
RXD pin
RXD pin
RT clock
Internal receive data
RT clock
Internal receive data
The baud rate of UART is set of UARTCR1<BRG>. The example of the baud rate are shown as follows.
When TC3 is used as the UART transfer rate (when UARTCR1<BRG> = “110”), the transfer clock and trans-
Transfer clock [Hz] = TC3 source clock [Hz] / TTREG3 setting value
Transfer Rate [baud] = Transfer clock [Hz] / 16
The UART receiver keeps sampling input using the clock selected by UARTCR1<BRG> until a start bit is detec-
Transfer Rate
Data Sampling Method
Table 11-1 Transfer Rate (Example)
BRG
000
001
010
011
100
101
RT0
RT0
Figure 11-4 Data Sampling Method
76800 [baud]
16 MHz
Start bit
1
Start bit
Start bit
1
Start bit
38400
19200
9600
4800
2400
2
2
3 4
3 4
5
5
(a) Without noise rejection circuit
(b) With noise rejection circuit
6
6
Page 124
7
7
8
8 9 10 11 12 13 14 15 0 1
9 10 11 12 13 14 15 0
38400 [baud]
Source Clock
8 MHz
19200
9600
4800
2400
1200
Bit 0
Bit 0
Bit 0
Bit 0
1
2 3
2
19200 [baud]
3
4 MHz
4
4
9600
4800
2400
1200
600
5
5 6
6
TMP86FH46BNG
7
7 8
8
9 10 11
9 10 11

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