PIC18F2480 MICROCHIP [Microchip Technology], PIC18F2480 Datasheet - Page 132

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PIC18F2480

Manufacturer Part Number
PIC18F2480
Description
28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC18F2480/2580/4480/4580
TABLE 10-1:
DS39637A-page 130
RA0/AN0/CV
RA1/AN1
RA2/AN2/V
RA3/AN3/V
RA4/T0CKI
RA5/AN4/SS/HLVDIN RA5
OSC2/CLKO/RA6
OSC1/CLKI/RA7
Legend:
Pin Name
REF
REF
PWR = Power Supply, OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input
REF
-
+
PORTA I/O SUMMARY
Function
RA0
AN0
CV
RA1
AN1
RA2
AN2
V
RA3
AN3
V
RA4
T0CKI
AN4
SS
HLVDIN
OSC2
CLKO
RA6
OSC1
CLKI
RA7
REF
REF
REF
-
+
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
TRIS
0
1
1
x
0
1
1
0
1
1
1
0
1
1
1
0
1
1
0
1
1
1
1
x
x
0
1
x
x
0
1
Buffer
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
TTL
DIG
DIG
TTL
DIG
TTL
ST
Preliminary
LATA<0> data output.
PORTA<0> data input.
digital input (read as clear – low level).
output overrides the digital I/O (read as clear – low level).
LATA<1> data output.
PORTA<1> data input.
digital input (read as clear – low level).
LATA<2> data output.
PORTA<2> data input.
digital input (read as clear – low level).
LATA<3> data output.
PORTA<3> data input.
digital input (read as clear – low level).
LATA<4> data output.
PORTA<4> data input.
LATA<5> data output.
PORTA<5> data input.
digital input (read as clear – low level).
Slave select input for MSSP.
Enabling OSC2 overrides digital I/O.
Output connection, selected by FOSC3:FOSC0 configuration bits.
Enabling CLKO overrides digital I/O (F
LATA<6> data output.
PORTA<6> data input.
Main oscillator input connection, determined by FOSC3:FOSC0
configuration bits. Enabling OSC1 overrides digital I/O.
configuration bits. Enabling CLKI overrides digital I/O.
LATA<7> data output.
PORTA<7> data input.
A/D input channel 0. Enabled on POR, this analog input overrides the
Comparator voltage reference analog output. Enabling this analog
A/D input channel 1. Enabled on POR, this analog input overrides the
A/D input channel 2. Enabled on POR, this analog input overrides the
A/D and comparator negative voltage analog input.
A/D input channel 3. Enabled on POR, this analog input overrides the
A/D and comparator positive voltage analog input.
Timer0 clock input.
A/D input channel 4. Enabled on POR, this analog input overrides the
High/Low-Voltage Detect external trip point input.
Output connection, selected by FOSC3:FOSC0 configuration bits.
Main clock input connection, determined by FOSC3:FOSC0
Description
 2004 Microchip Technology Inc.
OSC
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