PIC18F2480 MICROCHIP [Microchip Technology], PIC18F2480 Datasheet - Page 373

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PIC18F2480

Manufacturer Part Number
PIC18F2480
Description
28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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BNC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
PC
If Carry
If Carry
No
Q1
Q1
PC
PC
Read literal
Read literal
operation
Branch if Not Carry
BNC
-128
if Carry bit is ‘0’
(PC) + 2 + 2n
None
If the Carry bit is ‘0’, then the program
will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
HERE
1110
No
‘n’
‘n’
Q2
Q2
=
=
=
=
=
n
n
address (HERE)
0;
address (Jump)
1;
address (HERE + 2)
127
0011
BNC
operation
Process
Process
Data
Data
No
PC
Q3
Q3
Jump
nnnn
Write to PC
operation
operation
PIC18F2480/2580/4480/4580
No
No
Q4
Q4
nnnn
Preliminary
BNN
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
No
PC
If Negative
If Negative
Q1
Q1
PC
PC
Read literal
Read literal
operation
Branch if Not Negative
BNN
-128
if Negative bit is ‘0’
(PC) + 2 + 2n
None
If the Negative bit is ‘0’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
HERE
1110
No
Q2
‘n’
Q2
‘n’
=
=
=
=
=
n
n
address (HERE)
0;
address (Jump)
1;
address (HERE + 2)
127
0111
BNN
operation
Process
Process
Data
Data
No
PC
Q3
Q3
DS39637A-page 371
Jump
nnnn
Write to PC
operation
operation
No
No
Q4
Q4
nnnn

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