PIC18F2480 MICROCHIP [Microchip Technology], PIC18F2480 Datasheet - Page 226

no-image

PIC18F2480

Manufacturer Part Number
PIC18F2480
Description
28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2480-E/ML
Manufacturer:
MICROCHIP
Quantity:
1 001
Part Number:
PIC18F2480-E/SO
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC18F2480-I/SO
Manufacturer:
Microchi
Quantity:
9 999
Part Number:
PIC18F2480-I/SO
Manufacturer:
MIC
Quantity:
20 000
Part Number:
PIC18F2480-I/SO
0
Part Number:
PIC18F2480-I/SP
Manufacturer:
TDK
Quantity:
64
Part Number:
PIC18F2480-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2480/2580/4480/4580
17.4.17.2
During a Repeated Start condition, a bus collision
occurs if:
a)
b)
When the user deasserts SDA and the pin is allowed to
float high, the BRG is loaded with SSPADD<6:0> and
counts down to 0. The SCL pin is then deasserted and
when sampled high, the SDA pin is sampled.
FIGURE 17-29:
FIGURE 17-30:
DS39637A-page 224
A low level is sampled on SDA when SCL goes
from low level to high level.
SCL goes low before SDA is asserted low, indi-
cating that another master is attempting to
transmit a data ‘1’.
SDA
SCL
BCLIF
RSEN
S
SSPIF
SDA
SCL
RSEN
BCLIF
S
SSPIF
Bus Collision During a Repeated
Start Condition
BUS COLLISION DURING A REPEATED START CONDITION (CASE 1)
BUS COLLISION DURING REPEATED START CONDITION (CASE 2)
SCL goes low before SDA,
set BCLIF. Release SDA and SCL.
Preliminary
T
BRG
Sample SDA when SCL goes high.
If SDA = 0, set BCLIF and release SDA and SCL.
masters can assert SDA at exactly the same time.
If SDA is low, a bus collision has occurred (i.e., another
master is attempting to transmit a data ‘0’, Figure 17-29).
If SDA is sampled high, the BRG is reloaded and begins
counting. If SDA goes from high to low before the BRG
times out, no bus collision occurs because no two
If SCL goes from high to low before the BRG times out
and SDA has not already been asserted, a bus collision
occurs. In this case, another master is attempting to
transmit a data ‘1’ during the Repeated Start condition,
see Figure 17-30.
If, at the end of the BRG time-out, both SCL and SDA
are still high, the SDA pin is driven low and the BRG is
reloaded and begins counting. At the end of the count
regardless of the status of the SCL pin, the SCL pin is
driven low and the Repeated Start condition is
complete.
T
Cleared in software
BRG
 2004 Microchip Technology Inc.
Interrupt cleared
in software
‘0’
‘0’
‘0’

Related parts for PIC18F2480