MC68HC912BD32CFU10 FREESCALE [Freescale Semiconductor, Inc], MC68HC912BD32CFU10 Datasheet - Page 105

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MC68HC912BD32CFU10

Manufacturer Part Number
MC68HC912BD32CFU10
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Clock Functions
Computer Operating Properly (COP)
5-clock
SLDV2 SLDV1 SLDV0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
The clock generation module generates and controls the timing of the
reset and power-on reset logic.
The COP or watchdog timer is an added check that a program is running
and sequencing properly. When the COP is being used, software is
responsible for keeping a free-running watchdog timer from timing out. If
the watchdog timer times out it is an indication that the software is no
longer being executed in the intended sequence; thus a system reset is
initiated. Three control bits allow selection of seven COP time-out
periods or COP disable. When COP is enabled, sometime during the
selected period the program must write $55 and $AA (in this order) to the
COPRST register. If the program fails to do this the part will reset. If any
value other than $55 or $AA is written to COPRST, the part is reset.
Table 19 Slow Mode Register Divider Rates
Freescale Semiconductor, Inc.
Divder
(2
For More Information On This Product,
128
Off
16
32
64
2
4
8
x
)
(16 MHz Oscillator)
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Bus Rate
62.5 kHz
31.2 kHz
500 kHz
250 kHz
125 kHz
4 MHz
2 MHz
1 MHz
Clocks
(32 MHz Oscillator)
Bus Rate
62.5 kHz
500 kHz
250 kHz
125 kHz
8 MHz
4 MHz
2 MHz
1 MHz
MC68HC912BD32 Rev 1.0
(40 MHz Oscillator)
Bus Rate
1.25 MHz
2.5 MHz
625 kHz
312 kHz
156 kHz
20 MHz
10 MHz
5 MHz
Clock Functions
Clocks

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