MC68HC912BD32CFU10 FREESCALE [Freescale Semiconductor, Inc], MC68HC912BD32CFU10 Datasheet - Page 163

• Manufacturer Part Number: MC68HC912BD32CFU10
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Bidirectional
Mode (MOMI or
SISO)
Register
Descriptions
17-sint
When SPE=1
Bidirectional
SPC0=0
SPC0=1
Normal
Mode
Mode
SWOM enables open drain output. PS4 becomes GPIO.
Figure 24 Normal Mode and Bidirectional Mode
Serial Out
Serial Out
Serial In
Serial In
SPI
SPI
In bidirectional mode, the SPI uses only one serial data pin for external
device interface. The MSTR bit decides which pin to be used. The MOSI
pin becomes serial data I/O (MOMI) pin for the master mode, and the
MISO pin becomes serial data I/O (SISO) pin for the slave mode. The
direction of each serial I/O pin depends on the corresponding DDRS bit.
Control and data registers for the SPI subsystem are described below.
The memory address indicated for each register is the default address
that is in use after reset. The entire 512-byte register block can be
mapped to any 2K byte boundary within the standard 64K byte address
space. For more information refer to
SWOM enables open drain output.
Freescale Semiconductor, Inc.
For More Information On This Product,
Master Mode
DDS5
DDS5
MSTR=1
Go to: www.freescale.com
Serial Interface
MOMI
PS4
MO
MI
SWOM enables open drain output. PS5 becomes GPIO.
Serial Out
Serial Out
Serial In
Serial In
Operating
SPI
SPI
SWOM enables open drain output.
Slave Mode
Serial Peripheral Interface (SPI)
DDS4
DDS4
MSTR=0
Modes.
MC68HC912BD32 Rev 1.0
Serial Interface
SISO
PS5
SO
SI