MC68HC912BD32CFU10 FREESCALE [Freescale Semiconductor, Inc], MC68HC912BD32CFU10 Datasheet - Page 166

• Manufacturer Part Number: MC68HC912BD32CFU10
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

SP0BR — SPI Baud Rate Register
SP0SR — SPI Status Register
Serial Interface
MC68HC912BD32 Rev 1.0
RESET:
RESET:
SPR2
0
0
0
0
1
1
1
1
SPIF
Bit 7
Bit 7
0
0
0
SPR1
0
0
1
1
0
0
1
1
WCOL
SPR0
6
0
0
6
0
0
1
0
1
0
1
0
1
SPR[2:0] — SPI Clock (SCK) Rate Select Bits
SPIF — SPI Interrupt Request
Read anytime. Write anytime.
At reset, E Clock divided by 2 is selected.
These bits are used to specify the SPI clock rate.
Read anytime. Write has no meaning or effect.
SPIF is set after the eighth SCK cycle in a data transfer and it is
cleared by reading the SP0SR register (with SPIF set) followed by an
access (read or write) to the SPI data register.
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 33 SPI Clock Rate Selection
E Clock
Divisor
5
0
0
5
0
0
128
256
16
32
64
2
4
8
Go to: www.freescale.com
MODF
E Clock = 4 MHz
Serial Interface
4
0
0
4
0
Frequency at
62.5 KHz
31.3 KHz
15.6 KHz
500 KHz
250 KHz
125 KHz
2.0 MHz
1.0 MHz
3
0
0
3
0
0
E Clock = 8 MHz
Frequency at
SPR2
62.5 KHz
31.3 KHz
500 KHz
250 KHz
125 KHz
4.0 MHz
2.0 MHz
1.0 MHz
2
0
2
0
0
SPR1
1
0
1
0
0
E Clock = 10 MHz
Frequency at
1.25 MHz
78.1 KHz
39.1 KHz
625 KHz
313 KHz
156 KHz
5.0 MHz
2.5 MHz
SPR0
Bit 0
Bit 0
0
0
0
$00D2
$00D3
20-sint