HI-6121PQMF HOLTIC [Holt Integrated Circuits], HI-6121PQMF Datasheet - Page 109

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HI-6121PQMF

Manufacturer Part Number
HI-6121PQMF
Description
MIL-STD-1553 Remote Terminal ICs
Manufacturer
HOLTIC [Holt Integrated Circuits]
Datasheet
HOST BUS INTERFACE, Cont. (HI-6120 ONLY)
A0 LB
D15:0
A15:1
A15:1
R / W
R / W
WAIT
WAIT
using BTYPE = 0 (”Motorola Style” - Single
using BTYPE = 0 (”Motorola Style” - Single Read/Write Strobe
D7:0
STR
STR
After first byte is read, prefetch allows faster access times for successive reads, as long as read addresses are sequential.
WAIT is always asserted during the first read cycle, is never asserted for successive read cycles to sequential adresses.
This allows default host bus configuration for the HI-6120 chip select to match the timing characteristics of the faster
successive cycles, while the slower initial cycle is handled on a WAIT-controlled exception basis. WAIT can be optionally inverted.
After first word is read, prefetch allows faster access times for successive reads, as long as read addresses are sequential.
WAIT is always asserted during the first read cycle, is never asserted for successive read cycles to sequential adresses.
This allows default host bus configuration for the HI-6120 chip select to match the timing characteristics of the faster
successive cycles, while the slower initial cycle is handled on a WAIT-controlled exception basis. WAIT can be optionally inverted.
CS
CS
t
t
WAS
WAS
FIGURE 24. Register and RAM Read Operations for BTYPE = 0
showing two successive words read from sequential addresses
High-Z
High-Z
HOST READ IN DUAL-BYTE MODE (8-BIT BUS WIDTH)
HOST READ IN WORD MODE (16-BIT BUS WIDTH)
All timing intervals equal
All timing intervals equal
showing two bytes read for a single 16-bit word
ADDRESS
t
W
HOLT INTEGRATED CIRCUITS
t
t
t
NSR
NSR
W
HI-6120, HI-6121
ADDRESS
BYTE 0
WORD
0 ns MIN
0 ns MIN
Read/Write Strobe
109
t
t
INACT
unless otherwise indicated.
INACT
unless otherwise indicated.
High-Z
High-Z
ADDRESS + 1
STR
STR
t
t
SR8
SR16
BYTE 1
WORD
and R/
and R/
W
W
t
t
INACT
INACT
Direction Select)
Direction Select)
High-Z
High-Z
STR assertion
for the next
Read or Write
STR assertion
for the next
Read or Write

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