HI-6121PQMF HOLTIC [Holt Integrated Circuits], HI-6121PQMF Datasheet - Page 12

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HI-6121PQMF

Manufacturer Part Number
HI-6121PQMF
Description
MIL-STD-1553 Remote Terminal ICs
Manufacturer
HOLTIC [Holt Integrated Circuits]
Datasheet
REGISTERS, Cont.
12
11
10
9
TTLOAD
RTTAG
ALTBITW
MCOPT4
Load Time-Tag Counter.
Reset Time-Tag Counter.
Alternate BIT Word Enable.
Mode Code Option 4.
ending in error. This bit should only be modified while Configuration Register 1 STEX bit is low.
Changes occurring while STEX = 1 cause unpredictable results. In a typical application, the buffer is
not directly accessed by the host, although there is no restriction preventing host data access.
When this bit is written from logic 0 to logic 1, data contained in the Time-Tag Utility register is written
to the Time-Tag counter. The TTLOAD register bit self-resets after use. See MCOPT3 bit which
affects automatic Time-Tag counter loading upon “synchronize” mode command with data word.
Assertion of this bit clears the Time-Tag counter and counting is disabled until the bit is negated. Also
the “synchronize” mode command (mode code 1) causes automatic Time-Tag counter reset.
If this bit is logic 0, the device responds to a “transmit BIT word” mode command (MC19) by sending
the word stored in the Built-In Test Word register, at address 0x0014. If this bit is logic 1, the terminal
transmits the word stored in the Alternate Built-In Test Word register, at address 0x0015. The
alternate register allows the user to fully define the BIT word, while the default register location
contains several predefined, device-controlled status bits.
Note: Mode commands MC4 and MC5 are not affected by the MCOPT4 bit, but are included in this
description to present a complete picture of device response to bus shutdown mode commands.
The Bus Controller exercises “shutdown“ control over the terminal’s connection to the inactive MIL-
STD-1553 bus using the “transmitter shutdown” (MC4) or “selected transmitter shutdown” (MC20
decimal) mode code commands. When the inactive transmitter is shutdown, the HI-612x device
inhibits further transmission on that bus. Once shutdown, the transmitter can be reactivated by (a) an
“override transmitter shutdown” (MC5) mode command, (b) an “override selected transmitter
shutdown” (MC21 decimal) mode command, (c) a “reset remote terminal” (MC8) mode command, (d)
hardware
When the MCOPT4 bit is reset, the device automatically performs bus shutdown and shutdown
override in response to mode commands. When the MCOPT4 bit is set, the device only transmits
status; the host must perform bus shutdown and override duties by asserting control of the TXINHA
and TXINHB bits in Configuration Register 1, or by controlling the input pins with the same function.
Mode commands MC4 (”transmitter shutdown”) and MC5 (”override transmitter shutdown”) have
unconditional shutdown or override response. When MC4 is received, the terminal fulfills shutdown
for the inactive bus, disabling the transmitter and receiver, or transmitter only, depending on the state
of the SDSEL bit in Configuration Register 1. The device affirms shutdown status by updating bits 15-
12 in the BIT Word Register. When mode command MC5 is received, inactive bus transmit and
receive is automatically reenabled by the device; “shutdown override” status is affirmed by resetting
the inactive bus shutdown bit(s) in the BIT Word Register.
The “selected transmitter shutdown” (MC20 decimal) and “override selected transmitter shutdown”
(MC21 decimal) mode commands act similarly to MC4 and MC5 respectively, except bus shutdown
(or shutdown override) is conditional, based on the value of a mode data word received with the
command. To act on a given bus, the received mode data word must match a predetermined “bus
select” value. Bus shutdown (or shutdown override) can only act on the inactive bus, and only when
the received mode data word matches the “bus select” value for that bus. When a MC20 mode data
word matches the “bus select” value for the inactive bus, the terminal fulfills shutdown for the inactive
bus, disabling the transmitter and receiver, or transmitter only, depending on the state of the SDSEL
bit in Configuration Register 1. The device affirms shutdown status by updating bits 15-12 in the BIT
Word Register. When a MC21 mode data word matches the “bus select” value for the inactive bus,
the terminal fulfills shutdown override for the inactive bus, enabling the transmitter (and receiver, if
the SDSEL bit in Configuration Register 1 is logic 0). The device affirms override status by resetting
bits 15-12 in the BIT Word Register.
When the MCOPT4 bit equals zero, unique “bus select” values should be initialized by the host in the
“Bus A Select” register (0x0012) and “Bus B Select” register (0x0013) for fulfillment of “selected
MR
master reset or (e) software reset by setting the SRST bit in Configuration Register 1.
HOLT INTEGRATED CIRCUITS
HI-6120, HI-6121
12

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