HI-6121PQMF HOLTIC [Holt Integrated Circuits], HI-6121PQMF Datasheet - Page 59

• Manufacturer Part Number: HI-6121PQMF
• Description: MIL-STD-1553 Remote Terminal ICs
• Manufacturer: HOLTIC [Holt Integrated Circuits]

CIRCULAR BUFFER MODE 1
CIRCULAR BUFFER MODE 1
The device offers two circular data buffer modes as
alternatives to ping-pong and indexed buffering. These
circular buffer options only apply for subaddress
commands, not mode code commands. Circular buffering
simplifies software servicing of the remote terminal when
implementing bulk data transfers. A circular buffer mode
can be selected for any subaddress by properly initializing
its descriptor Control Word.
selected when descriptor Control Word PPEN and
CIR2EN bits are both 0, and the CIR1EN bit is logic 1.
When a subaddress uses circular buffer mode 1, its four
word block in the Descriptor Table is defined as follows:
If Descriptor Word 1 is stored at memory address N,
Descriptor Word 2 is stored at address N+1, and the other
two words are stored at addresses N+2 and N+3.
Figure 15 provides a generalized illustration of Circular
Buffer Mode 1, while Figure 16 shows a specific example.
Circular Buffer Mode 1 uses a single user-defined buffer
that merges all transmit or receive data, along with
message information. Two words (Message Information
and Time-Tag) are stored at the beginning of the block for
each message, followed by the message data word(s).
The Mode 1 buffer pointers roll over (are reset to their base
addresses) when the allocated data buffer memory is full.
For each valid receive message, the device enters a
Message Information word, Time-Tag word and data
word(s) into the circular receive buffer. For each valid
transmit message, the device enters a Message
Information word and a Time-Tag word into reserved
memory locations within the circular transmit buffer. The
device automatically controls the wrap around of circular
buffers.
Two pointers define circular buffer length: start of buffer
(lowest address) and end of buffer (highest address). User
specifies the start of buffer (SA) by writing the lowest
address value into the second word of a unique
subaddress descriptor block. The user defines the bottom
of the buffer (EA) by writing the highest address value to
the fourth word of that unique descriptor block. Both SA
and EA remain static during message processing. The
third word in the descriptor block identifies the current
address CA (i.e., last accessed address plus one). The
circular buffer wraps to the start address after completing a
message that results in CA being greater than or equal to
EA. If CA increments past EA during message processing,
the device will access memory addresses greater than the
EA value. Reserve 33 address locations past the EA
address to accommodate a worst-case 32 data word
message with a record starting at address = EA minus 1.
Each receive subaddress and transmit subaddress may
Descriptor Word 1
Descriptor Word 2
Descriptor Word 3
Descriptor Word 4
Control Word
SA (buffer start address)
CA (buffer current address)
EA (buffer end address)
Circular Buffer Mode 1 is
HOLT INTEGRATED CIRCUITS
HI-6120, HI-6121
59
have a unique circular buffer assignment. The RT decodes
the command word
count / mode code field to select the unique command
descriptor block containing the Control Word, SA pointer,
CA pointer and EA pointer.
For receive messages, the device stores the Message
Information word to the address specified by CA, the Time-
Tag word into CA+1 and the data into the next “N” locations
starting with CA+2. For transmit messages, the device
stores the Message Information word to the address
specified by CA and the Time-Tag word into CA+1.
Retrieval of data for transmission starts at address CA+2.
When entering multiple transmit command data packets
into the circular buffer, delimit each data packet with two
reserved memory locations. The device stores the
Message Information word and Time-Tag word into the
reserved locations when processing the command.
Message processing for all commands begins with the
device reading the unique descriptor block for the
subaddress or mode code specified by the
subaddress and word count fields in the received
command word.
For receive messages, the device stores “N” received data
words in the circular data buffer. The first data word
received is stored at the location specified by the CA
pointer +2. After message completion, the device stores
the Message Information word and Time-Tag words to
addresses CA and CA+1 respectively. If no errors were
detected, the device updates descriptor CA register. If the
next address location (last stored data word +1) is less
than
+1). If the next address location (last stored data word +1)
is greater than EA, the data buffer is full (or empty); CA is
updated to the SA value. If descriptor Control Word IXEQZ
bit is asserted (and if Interrupt Enable Register IXEQZ bit is
asserted) the device generates an interrupt to indicate full
receive buffer by asserting the
Although all messages store Message Information and
Time-Tag words, no data is stored if the message ended
with error, or if the Busy status bit was set or if the
commend was illegal (example: illegalized word count).
Such messages do not update CA, so the next message
overwrites the same buffer space.
For transmit commands, the device begins transmission of
data retrieving the first data word stored at address CA+2.
(Reminder: addresses CA and CA+1 are reserved for the
Message Information and Time-Tag words.) When
message processing is complete, the device writes the
Message Information and Time-Tag words into the buffer. If
no errors were detected, the device updates descriptor CA
register. If the next address location (last retrieved data
word +1) is less than
retrieved address +1). If the next address location (last
retrieved data word +1) is greater than EA, the transmit
data buffer is empty; CA is updated to the SA value. If the
or equal to
EA, CA is updated to (last stored address
or equal to
T/
R
bit, subaddress field and word
INTMES
EA, CA is updated to (last
interrupt output.
T/
R
bit,