ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 32
![KIT DEV/EVAL FOR AVR32 AT32UC3A](/photos/9/20/92035/atevk1104_sml.jpg)
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
- Current page: 32 of 826
- Download datasheet (20Mb)
Table 9-4.
32058J–AVR32–04/11
Priority
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Handler Address
0x8000_0000
Provided by OCD system
EVBA+0x00
EVBA+0x04
EVBA+0x08
EVBA+0x0C
EVBA+0x10
Autovectored
Autovectored
Autovectored
Autovectored
EVBA+0x14
EVBA+0x50
EVBA+0x18
EVBA+0x1C
EVBA+0x20
EVBA+0x24
EVBA+0x28
EVBA+0x2C
EVBA+0x30
EVBA+0x100
EVBA+0x34
EVBA+0x38
EVBA+0x60
EVBA+0x70
EVBA+0x3C
EVBA+0x40
EVBA+0x44
Priority and handler addresses for events
Name
Reset
OCD Stop CPU
Unrecoverable exception
TLB multiple hit
Bus error data fetch
Bus error instruction fetch
NMI
Interrupt 3 request
Interrupt 2 request
Interrupt 1 request
Interrupt 0 request
Instruction Address
ITLB Miss
ITLB Protection
Breakpoint
Illegal Opcode
Unimplemented instruction
Privilege violation
Floating-point
Coprocessor absent
Supervisor call
Data Address (Read)
Data Address (Write)
DTLB Miss (Read)
DTLB Miss (Write)
DTLB Protection (Read)
DTLB Protection (Write)
DTLB Modified
Event source
External input
OCD system
Internal
MPU
Data bus
Data bus
External input
External input
External input
External input
External input
CPU
MPU
MPU
OCD system
Instruction
Instruction
Instruction
UNUSED
UNUSED
Instruction
CPU
CPU
MPU
MPU
MPU
MPU
UNUSED
Undefined
First non-completed instruction
First non-completed instruction
PC of offending instruction
PC of offending instruction
PC of offending instruction
PC of offending instruction
PC(Supervisor Call) +2
PC of offending instruction
PC of offending instruction
PC of offending instruction
PC of offending instruction
Stored Return Address
First non-completed instruction
PC of offending instruction
First non-completed instruction
First non-completed instruction
First non-completed instruction
First non-completed instruction
First non-completed instruction
PC of offending instruction
First non-completed instruction
AT32UC3A
32
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