ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 539

KIT DEV/EVAL FOR AVR32 AT32UC3A

ATEVK1104

Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets

Specifications of ATEVK1104

Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
Clear to disable the Role Exchange interrupt (ROLEEXI).
• HNPERRE: HNP Error Interrupt Enable
Set to enable the HNP Error interrupt (HNPERRI).
Clear to disable the HNP Error interrupt (HNPERRI).
• STOE: Suspend Time-Out Interrupt Enable
Set to enable the Suspend Time-Out interrupt (STOI).
Clear to disable the Suspend Time-Out interrupt (STOI).
• VBUSHWC: VBus Hardware Control
Set to disable the hardware control over the USB_VBOF output pin.
Clear to enable the hardware control over the USB_VBOF output pin.
If cleared, then the USB macro considers VBus problems and resets the USB_VBOF output pin in that event.
• SRPSEL: SRP Selection
Set to choose VBus pulsing as SRP method.
Clear to choose data line pulsing as SRP method.
• SRPREQ: SRP Request
Set to initiate an SRP when the controller is in device mode.
Cleared by hardware when the controller is initiating an SRP.
• HNPREQ: HNP Request
When the controller is in device mode:
When the controller is in host mode:
• OTGPADE: OTG Pad Enable
Set to enable the OTG pad.
Clear to disable the OTG pad.
Note that this bit can be set/cleared even if USBE = 0 or FRZCLK = 1. Disabling the USB controller (by clearing the USBE
bit) does not reset this bit.
• VBUSPO: VBus Polarity
When 0, the USB_VBOF output signal is in its default mode (active high).
When 1, the USB_VBOF output signal is inverted (active low).
To be generic. May be useful to control an external VBus power module.
Note that this bit can be set/cleared even if USBE = 0 or FRZCLK = 1. Disabling the USB controller (by clearing the USBE
bit) does not reset this bit.
32058J–AVR32–04/11
Set to initiate an HNP.
Cleared by hardware when the controller is initiating an HNP.
Set to accept an HNP.
Clear otherwise.
AT32UC3A
539

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