ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 815
![KIT DEV/EVAL FOR AVR32 AT32UC3A](/photos/9/20/92035/atevk1104_sml.jpg)
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
- Current page: 815 of 826
- Download datasheet (20Mb)
41. 5 . 17
41.5.14
41.5.15
41.5.16
32058J–AVR32–04/11
F LASHC
OCD
PDCA
TWI
1. Reading from on-chip flash may fail after a flash fuse write operation (FLASHC LP,
2. The RTC CLKEN bit (bit number 16) of CTRL register is not available.
1. Stalled memory access instruction writeback fails if followed by a HW breakpoint.
1. Wrong PDCA behavior when using two PDCA channels with the same PID.
1. The TWI RXRDY flag in SR register is not reset when a software reset is performed.
UP, WGPB, EGPB, SSB, PGPFB, EAGPF commands).
After a flash fuse write operation (FLASHC LP, UP, WGPB, EGPB, SSB, PGPFB, EAGPF
commands), the following flash read access may return corrupted data. This erratum does
not affect write operations to regular flash memory.
Fix/Workaround
The flash fuse write operation (FLASHC LP, UP, WGPB, EGPB, SSB, PGPFB, EAGPF
commands) must be issued from internal RAM. After the write operation, perform a dummy
flash page write operation (FLASHC WP). Content and location of this page is not important
and filling the write buffer with all one (FFh) will leave the current flash content unchanged. It
is then safe to read and fetch code from the flash.
Fix/Workaround
Do not use the CLKEN bit of the RTC on Rev E.
Consider the following assembly code sequence:
A
B
If a hardware breakpoint is placed on instruction B, and instruction A is a memory access
instruction, register file updates from instruction A can be discarded.
Fix/Workaround
Do not place hardware breakpoints, use software breakpoints instead.
Alternatively, place a hardware breakpoint on the instruction before the memory
access instruction and then single step over the memory access instruction.
Workaround/fix
The same PID should not be assigned to more than one channel.
Fix/Workaround
After a Software Reset, the register TWI RHR must be read.
815
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