ATEVK1104 Atmel, ATEVK1104 Datasheet - Page 5
![KIT DEV/EVAL FOR AVR32 AT32UC3A](/photos/9/20/92035/atevk1104_sml.jpg)
ATEVK1104
Manufacturer Part Number
ATEVK1104
Description
KIT DEV/EVAL FOR AVR32 AT32UC3A
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1104.pdf
(90 pages)
4.ATEVK1104.pdf
(6 pages)
5.ATEVK1104.pdf
(12 pages)
Specifications of ATEVK1104
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A3
Data Bus Width
32 bit
Interface Type
USB, SPI, USART
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A3256
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATEVK1104
Manufacturer:
Atmel
Quantity:
135
- ATAVRONE-PROBECBL PDF datasheet
- ATEVK1104 PDF datasheet #2
- ATEVK1104 PDF datasheet #3
- ATEVK1104 PDF datasheet #4
- ATEVK1104 PDF datasheet #5
- Current page: 5 of 826
- Download datasheet (20Mb)
4. Blockdiagram
Figure 4-1.
32058J–AVR32–04/11
RESET_N
PA
PB
PC
PX
VBU S
D+
D -
Blockdiagram
TC K
TDO
TM S
TD I
XO UT32
XO U T0
XO U T1
R XD[3..0],
TXD [3..0],
XIN 32
R X_CLK,
TX_C LK,
XIN0
XIN1
R X_DV,
TX_EN ,
TX_ER ,
SPEED
RX_ER
VBO F
M DC ,
M D IO
CO L,
CR S,
ID
EXTIN T[7..0]
G CLK[3..0]
KPS[7..0]
CLK[2..0]
N M I_N
A[2..0]
B[2..0]
115 kHz
RCO SC
32 KHz
O SC0
O SC1
PLL0
PLL1
M SEO[1..0]
O SC
M D O[5..0]
INTERFACE
INTERFACE
EVTO_N
ETHERNET
EVTI_N
M C KO
JTAG
DM A
DM A
USB
M AC
TIM ER /CO UNTER
CO NTRO LLER
CO NTRO LLER
CO NTRO LLER
PB
CO NTRO LLER
CO NTRO LLER
G ENERATO R
W ATCHDO G
INTERRUPT
INTERRUPT
EXTERNAL
REAL TIM E
M ANAG ER
CO UNTER
BRIDG E B
S
M
M
PO W ER
HSB-PB
CLO CK
CLO CK
RESET
SLEEP
TIM ER
CLASS 2+
NEXUS
S
H S
O CD
B
M
C ON FIGU RATIO N
INTERFACE
INSTR
HIG H SPEED
BUS M ATRIX
M EM O RY PRO TEC TIO N U NIT
BRIDG E A
HSB-PB
M
H SB
PB
S
UC CPU
REG ISTER S BUS
INTERFACE
DATA
M
CO NTRO LLER
SYNCHRO NO US
PERIPHERAL
INTERFACE 0/1
CO NTRO LLER
PULSE W IDTH
CO NTRO LLER
M O DULATIO N
PERIPHERAL
CO NVERTER
ANALO G TO
INTERFACE
BITSTREAM
TW O -W IRE
DIG ITAL
USART1
USART0
USART2
USART3
SERIAL
SERIAL
DM A
AUDIO
DAC
M
S
S
S
LOC AL BU S
INTERFACE
SRAM
64 KB
RX _C LO C K, R X_FRA ME _SYN C
TX _C LO C K, TX_FRA ME _SYN C
D SR, DTR, D CD , RI
D ATAN [1..0]
M ISO , M O SI
NPC S[3..1]
DATA[1..0]
PW M [6..0]
R TS, C TS
R TS, C TS
R X_D ATA
TX_D ATA
AD[7..0]
512 KB
FLASH
NPC S0
SC K
SD A
R XD
TXD
R XD
TXD
SC L
CLK
CLK
FAST G PIO
ADD R[23..0]
D ATA[15..0]
NC S[3..0]
SDC KE
SD CS0
NW AIT
SD A10
SD W E
N W E0
N W E1
N W E3
SD CK
N RD
RAS
CAS
AT32UC3A
AD VREF
PA
PB
PC
PX
5
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