DK-DEV-3SL150N Altera, DK-DEV-3SL150N Datasheet - Page 110
DK-DEV-3SL150N
Manufacturer Part Number
DK-DEV-3SL150N
Description
KIT DEVELOPMENT STRATIX III
Manufacturer
Altera
Series
Stratix® IIIr
Type
FPGAr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.DK-DEV-3SL150N.pdf
(34 pages)
Specifications of DK-DEV-3SL150N
Contents
Development Platform, Cables and Software
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP3S
Silicon Family Name
Stratix III
Kit Contents
Development Board, Cable And Accessories
Rohs Compliant
Yes
For Use With/related Products
EP3SL150F152
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2568
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-3SL150N
Manufacturer:
Altera
Quantity:
135
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1–110
Table 1–65. EP3SL110 Column Pins Input Timing Parameters (Part 2 of 2)
Table 1–66. EP3SL110 Row Pins Input Timing Parameters (Part 1 of 3)
Stratix III Device Handbook, Volume 2
DIFFERENTIAL
1.8-V HSTL
CLASS II
DIFFERENTIAL
1.5-V SSTL
CLASS I
DIFFERENTIAL
1.5-V SSTL
CLASS II
DIFFERENTIAL
1.8-V SSTL
CLASS I
DIFFERENTIAL
1.8-V SSTL
CLASS II
DIFFERENTIAL
2.5-V SSTL
CLASS I
DIFFERENTIAL
2.5-V SSTL
CLASS II
LVDS
I/O Standard
I/O Standard
Clock
GCLK
GCLK
PLL
Clock
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
PLL
PLL
PLL
PLL
PLL
PLL
PLL
Table 1–66
t
t
t
t
su
su
h
h
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
su
su
su
su
su
su
su
su
su
su
su
su
su
su
h
h
h
h
h
h
h
h
h
h
h
h
h
h
Industrial Commercial
Industrial Commercial
-0.919
-0.698
1.043
0.959
-0.814
-0.878
-0.802
-0.890
-0.802
-0.890
-0.814
-0.878
-0.814
-0.878
-0.821
-0.871
-0.821
-0.871
0.933
1.131
0.921
1.143
0.921
1.143
0.933
1.131
0.933
1.131
0.940
1.124
0.940
1.124
Fast Model
Fast Model
lists the EP3SL110 parameters for differential I/O standards.
-0.950
-0.708
1.092
0.987
-0.852
-0.881
-0.841
-0.892
-0.841
-0.892
-0.852
-0.881
-0.852
-0.881
-0.858
-0.875
-0.858
-0.875
0.990
1.155
0.979
1.166
0.979
1.166
0.990
1.155
0.990
1.155
0.996
1.149
0.996
1.149
-1.021 -0.981 -1.115 -1.070 -1.404 -0.940
-1.513 -1.828 -1.977 -1.881 -1.804 -1.875
1.245
1.949
1.1 V
-1.247 -1.356 -1.480 -1.422 -1.778 -1.355 -1.476 -1.424 -1.819
-1.385 -1.554 -1.707 -1.626 -1.530 -1.565 -1.720 -1.635 -1.576
-1.238 -1.345 -1.461 -1.403 -1.759 -1.344 -1.458 -1.406 -1.801
-1.395 -1.565 -1.726 -1.645 -1.549 -1.576 -1.738 -1.653 -1.594
-1.238 -1.345 -1.461 -1.403 -1.759 -1.344 -1.458 -1.406 -1.801
-1.395 -1.565 -1.726 -1.645 -1.549 -1.576 -1.738 -1.653 -1.594
-1.247 -1.356 -1.480 -1.422 -1.778 -1.355 -1.476 -1.424 -1.819
-1.385 -1.554 -1.707 -1.626 -1.530 -1.565 -1.720 -1.635 -1.576
-1.247 -1.356 -1.480 -1.422 -1.778 -1.355 -1.476 -1.424 -1.819
-1.385 -1.554 -1.707 -1.626 -1.530 -1.565 -1.720 -1.635 -1.576
-1.259 -1.361 -1.480 -1.424 -1.777 -1.359 -1.471 -1.422 -1.815
-1.372 -1.546 -1.704 -1.623 -1.526 -1.558 -1.720 -1.636 -1.575
-1.259 -1.361 -1.480 -1.424 -1.777 -1.359 -1.471 -1.422 -1.815
-1.372 -1.546 -1.704 -1.623 -1.526 -1.558 -1.720 -1.636 -1.575
V
1.436
1.789
1.426
1.798
1.426
1.798
1.436
1.789
1.436
1.789
1.449
1.777
1.449
1.777
1.1 V
V
C2
CCL
C2
CCL
=
=
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
1.237
2.324
1.1 V
V
1.568
2.009
1.557
2.020
1.557
2.020
1.568
2.009
1.568
2.009
1.576
2.004
1.576
2.004
1.1 V
V
C3
CCL
C3
CCL
=
=
1.395
2.527
1.1 V
V
1.712
2.210
1.693
2.229
1.693
2.229
1.712
2.210
1.712
2.210
1.715
2.210
1.715
2.210
1.1 V
V
C4
CCL
C4
CCL
=
=
1.339
2.403
1.1 V
1.645
2.104
1.626
2.123
1.626
2.123
1.645
2.104
1.645
2.104
1.648
2.102
1.648
2.102
V
1.1 V
V
CCL
CCL
=
=
C4L
C4L
1.672
2.334
1.999
2.013
1.980
2.032
1.980
2.032
1.999
2.013
1.999
2.013
2.003
2.014
2.003
2.014
0.9 V
V
0.9 V
V
CCL
CCL
=
=
© July 2010 Altera Corporation
1.207
2.384
1.576
2.027
1.565
2.038
1.565
2.038
1.576
2.027
1.576
2.027
1.583
2.023
1.583
2.023
1.1 V
1.1 V
V
V
CCL
I3
CCL
I3
=
=
-1.066
-2.032
1.717
2.233
1.699
2.251
1.699
2.251
1.717
2.233
1.717
2.233
1.717
2.238
1.717
2.238
1.358
2.597
1.1 V
V
1.1 V
V
CCL
I4
CCL
I4
=
=
I/O Timing
1.654
2.122
1.636
2.140
1.636
2.140
1.654
2.122
1.654
2.122
1.653
2.124
1.653
2.124
-1.023
-1.933
1.1 V
1.303
2.470
V
1.1 V
V
CCL
CCL
=
=
I4L
I4L
2.040
2.062
2.022
2.080
2.022
2.080
2.040
2.062
2.040
2.062
2.041
2.066
2.041
2.066
0.9 V
-1.442
-1.853
V
1.711
2.387
0.9 V
V
CCL
CCL
=
=
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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