XE8000EV108 Semtech, XE8000EV108 Datasheet - Page 119

EVAL BOARD FOR XE8806/XE8807

XE8000EV108

Manufacturer Part Number
XE8000EV108
Description
EVAL BOARD FOR XE8806/XE8807
Manufacturer
Semtech
Type
MCUr
Datasheets

Specifications of XE8000EV108

Contents
Fully Assembled Evaluation Board
For Use With/related Products
XE88LC06AMI026
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
16.4 Interrupts map
16.5 Conditional edge detection 1
Condition 1 is satisfied when S0=1 at the falling edge of S1. The bit UsrtCond1 in RegUsrtCond1 is set when the
condition 1 is detected and the USRT interface is enabled (UsrtEnable=1). Condition 1 is asserted for both modes
(receiver and transmitter). The UsrtCond1 bit is read only and is cleared by all reset conditions and by writing any
data to its address.
Condition 1 occurrence also generates an interrupt on Irq_cond1.
16.6 Conditional edge detection 2
Condition 2 is satisfied when S0=1 at the rising edge of S1. The bit UsrtCond2 in RegUsrtCond2 is set when the
condition 2 is detected and the USRT interface is enabled. Condition 2 is asserted for both modes (receiver and
transmitter). The UsrtCond2 bit is read only and is cleared by all reset conditions and by writing any data to its
address.
Condition 2 occurrence also generates an interrupt on Irq_cond2.
© Semtech 2006
S1
S0
S1
S0
Irq_cond2
Irq_cond1
interrupt source
Table 16-9: Interrupts map
RegIrqMid(7)
RegIrqMid(6)
Figure 16-1: Condition 1
Figure 16-2: Condition 2
default mapping in the interrupt manager
16-4
XE8806A/XE8807A
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