XE8000EV108 Semtech, XE8000EV108 Datasheet - Page 67

• Manufacturer Part Number: XE8000EV108
• Description: EVAL BOARD FOR XE8806/XE8807
• Manufacturer: Semtech
• Type: MCUr

Specifications of XE8000EV108

• Contents: Fully Assembled Evaluation Board
• For Use With/related Products: XE88LC06AMI026
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Note: Depending on the status of the EnResetPConf bit in RegSysCtrl, RegPAEdge, RegPADebounce and
RegPACtrl can be reset by any of the possible system resets or only with power-on reset and NRESET pad.
11.4 Interrupts and events map
11.5 Port A (PA) Operation
The Port A input status (debounced or not) can be read from RegPAin.
Debounce mode:
Each bit in Port A can be individually debounced by setting the corresponding bit in RegPADebounce. After reset,
the debounce function is disabled. After enabling the debouncer, the change of the input value is accepted only if
height consecutive samples are identical. Selection of the clock is done by bit DebFast in Register RegPACtrl.
Note: The tolerance on the debounce frequency depends on the selected clock source. When the external clock is
used, the pulse width will be correct if the input of the low prescaler is set to a frequency close to 32kHz (see clock
block documentation).
Pullups/Snap-to-rail:
Different functions are possible depending on the value of the registers RegPAPullup and RegPASnaptorail.
When the corresponding bit in RegPAPullup is set to 0, the inputs are floating (pullup and pulldown resistors are
disconnected). When the corresponding bit in RegPAPullup is 1 and in RegPASnaptorail is 0, a pullup resistor is
connected to the input pin. Finally, when the corresponding bit in RegPAPullup is 1 and in RegPASnaptorail is 1,
the snap-to-rail function is active.
© Semtech 2006
pos.
pos.
7:1
7:0
0
Interrupt source
pa_irqbus[5]
pa_irqbus[4]
pa_irqbus[1]
pa_irqbus[0]
pa_irqbus[7]
pa_irqbus[6]
pa_irqbus[3]
pa_irqbus[2]
RegPACtrl
RegPASnaptorail
PASnaptorail[7:0]
DebFast
[7:1]
RegIrqMid[5]
RegIrqMid[4]
RegIrqMid[1]
RegIrqMid[0]
RegIrqLow[7]
RegIrqLow[6]
RegIrqLow[3]
RegIrqLow[2]
the interrupt manager
Default mapping in
DebFast
rw
r
r w
rw
rw
Table 11-10: debounce frequency selection
0
1
reset
0000000
0 nresetpconf
reset
0 nresetpconf
Table 11-9: RegPASnaptorail
Table 11-8: RegPACtrl
11-4
Clock filter
RegEvn[4]
RegEvn[0]
Default mapping in the
32kHz
1kHz
description
description
event manager
0 = slow debounce, 1 = fastdebounce
set snap-to-rail input on
Unused
XE8806A/XE8807A
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