DSPIC30F3010-20I/SP Microchip Technology, DSPIC30F3010-20I/SP Datasheet - Page 100

IC DSPIC MCU/DSP 24K 28DIP

DSPIC30F3010-20I/SP

Manufacturer Part Number
DSPIC30F3010-20I/SP
Description
IC DSPIC MCU/DSP 24K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3010-20I/SP

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
24KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F301020ISP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3010-20I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
dsPIC30F3010/3011
15.1.4
In the Double-Update mode (PTMOD<1:0> = 11), an
interrupt event is generated each time the PTMR regis-
ter is equal to zero, as well as each time a period match
occurs. The postscaler selection bits have no effect in
this mode of the timer.
The Double-Update mode provides two additional
functions to the user. First, the control loop bandwidth
is doubled because the PWM duty cycles can be
updated, twice per period. Second, asymmetrical
center-aligned PWM waveforms can be generated,
which are useful for minimizing output waveform
distortion in certain motor control applications.
15.1.5
The input clock to PTMR (F
options of 1:1, 1:4, 1:16, or 1:64, selected by control
bits, PTCKPS<1:0> in the PTCON SFR. The prescaler
counter is cleared when any of the following occurs:
• A write to the PTMR register
• A write to the PTCON register
• Any device Reset
The PTMR register is not cleared when PTCON is
written.
15.1.6
The match output of PTMR can optionally be post-
scaled through a 4-bit postscaler (which gives a 1:1 to
1:16 scaling).
The postscaler counter is cleared when any of the
following occurs:
• A write to the PTMR register
• A write to the PTCON register
• Any device Reset
The PTMR register is not cleared when the PTCON
register is written.
DS70141F-page 100
Note:
DOUBLE-UPDATE MODE
Programming a value of 0x0001 in the
Period register could generate a continu-
ous interrupt pulse, and hence, must be
avoided.
PWM TIME BASE PRESCALER
PWM TIME BASE POSTSCALER
OSC
/4), has prescaler
15.2
PTPER is a 15-bit register and is used to set the
counting period for the PWM time base. PTPER is a
double- buffered register. The PTPER buffer contents
are loaded into the PTPER register at the following
instances:
• Free-Running and Single-Shot modes: When the
• Continuous Up/Down Count modes: When the
The value held in the PTPER buffer is automatically
loaded into the PTPER register when the PWM time
base is disabled (PTEN = 0).
The
Equation
EQUATION 15-1:
If the PWM time base is configured for one of the
Continuous Up/Down Count modes, the PWM period is
given by
EQUATION 15-2:
The maximum resolution (in bits) for a given device
oscillator and PWM frequency can be determined using
Equation
EQUATION 15-3:
T
T
PTMR register is reset to zero after a match with
the PTPER register.
PTMR register is zero.
PWM
PWM
PWM
= T
= T
Resolution =
PWM Period
Equation
15-1:
15-3:
CY
CY
period
2
(PTPER + 1)
(PTPER + 1)
15-2.
PWM PERIOD
(FREE-RUNNING MODE)
PWM PERIOD (UP/DOWN
COUNTING MODE)
PWM RESOLUTION
can
© 2010 Microchip Technology Inc.
log (2
log (2)
be
PTMR Prescale Value
T
PTMR Prescale Value
PWM
determined
/ T
CY
)
using

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