DSPIC30F3010-20I/SP Microchip Technology, DSPIC30F3010-20I/SP Datasheet - Page 62

• Manufacturer Part Number: DSPIC30F3010-20I/SP
• Description: IC DSPIC MCU/DSP 24K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3010-20I/SP

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 24KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F301020ISP

dsPIC30F3010/3011
FIGURE 8-2:
8.2
The use of the ADPCFG and TRIS registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their correspond-
ing TRIS bit set (input). If the TRIS bit is cleared
(output), the digital output level (V
converted.
When reading the PORT register, all pins configured as
analog input channel will read as cleared (a low level).
Pins configured as digital inputs will not convert an
analog input. Analog levels on any pin that is defined as
a digital input (including the ANx pins), may cause the
input buffer to consume current that exceeds the
device specifications.
DS70141F-page 62
Configuring Analog Port Pins
Data Bus
WR TRIS
WR LAT +
WR PORT
BLOCK DIAGRAM OF A SHARED PORT STRUCTURE
Read PORT
Peripheral Output Enable
Peripheral Output Data
Peripheral Input Data
Peripheral Module Enable
PIO Module
Peripheral Module
Read TRIS
Read LAT
OH
TRIS Latch
Data Latch
D
D
CK
CK
or V
OL
Q
Q
) will be
8.2.1
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically this instruction
would be a NOP.
EXAMPLE 8-1:
MOV
MOV
NOP
BTSS
1
1
0
0
0xFF00, W0
W0, TRISBB
PORTB, #13
Output Data
Output Enable
I/O PORT WRITE/READ TIMING
Output Multiplexers
Input Data
I/O Cell
; Configure PORTB<15:8>
; as inputs
; and PORTB<7:0> as outputs
; Delay 1 cycle
; Next Instruction
PORT WRITE/READ
EXAMPLE
© 2010 Microchip Technology Inc.
I/O Pad