AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 523

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

27.7.4
Register Name:
Access Type:
Offset:
Reset Value:
• PS: Page Size
• PMEN: Page Mode Enabled
• TDFMODE: TDF Optimization
• TDFCYCLES: Data Float Time
32054F–AVR32–09/09
PS
0
1
2
3
31
23
15
–
–
–
7
–
If page mode is enabled, this field indicates the size of the page in bytes.
1: Asynchronous burst read in page mode is applied on the corresponding chip select.
0: Standard read is applied.
1: TDF optimization is enabled. The number of TDF wait states is optimized using the setup period of the next read/write
access.
0: TDF optimization is disabled.The number of TDF wait states is inserted before the next access begins.
This field gives the integer number of clock cycles required by the external device to release the data after the rising edge of the
read controlling signal. The SMC always provide one full cycle of bus turnaround after the TDFCYCLES period. The external
bus cannot be used by another chip select during TDFCYCLES plus one cycles. From 0 up to 15 TDFCYCLES can be set.
Mode Register
Page Size
4-byte page
8-byte page
16-byte page
32-byte page
30
22
14
–
–
–
6
–
MODE
Read/Write
0x0C + CS_number*0x10
0x10002103
29
21
13
–
5
EXNWMODE
DBW
PS
TDFMODE
28
20
12
4
27
19
11
–
–
3
–
26
18
10
–
–
2
–
TDFCYCLES
WRITEMODE
25
17
–
9
–
1
AT32AP7002
READMODE
PMEN
BAT
24
16
8
0
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