AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 762

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

34.11 General-purpose Register
32054F–AVR32–09/09
In order to locate the displayed window within a larger frame buffer, the software must:
The above configuration can be changed frame to frame, so the displayed window can be
moved rapidly. Note that the FRMSIZE field of DMAFRMCFG register must be updated with any
movement of the displaying window. Note also that the software must write bit DMAUPDT in
DMACON register after each configuration for it to be accepted by LCDC.
Note:
The LCD Controller has eight general-purpose output lines that are controlled by a general-pur-
pose register (LCDGPR). The use of these lines is not fixed; they can be used in a wide range of
applications. Some applications examples are:
•Program the DMABADDR1 (DMABADDR2) register(s) to make them point to the word
•Program the PIXELOFF field of DMA2DCFG register to specify the offset of this first pixel
•Define the width of the complete frame buffer by programming in the field ADDRINC of
•Enable the 2D addressing mode by writing the DMA2DEN bit in DMACON register. If this bit is
•Palette swapping: In this application, the size of the palette memory is doubled. The two extra
•Common intensity control in TFT mode: In this application, the most significant bit of each
•Control of signals of LCD modules not included in the LCD Interface, such as a
containing the first pixel of the area of interest.
within the 32-bit memory word that contains it.
DMA2DCFG register the address increment between the last word of a line and the first word
of the next line (in number of 32-bit words).
not activated, the values in the DMA2DCFG register are not considered and the controller
assumes that the displayed area occupies a continuous portion of the memory.
bits in the addresses (one extra bit in the low-priority address and one extra bit in the high-
priority address) are connected to two general-purpose lines. One line is used to select the
palette being updated through the HSB slave interface and the other line is used to select the
working palette.
LCD component of the TFT interface is logically OR-ed with a general-purpose line. If the
most significant bit of each color component in the palette is 0, the intensity can be controlled
with the single general-purpose line.
standard/reverse scanning configuration pin, backlight on/off pin or user LEDs of the LCD
module.
In 24 bpp packed mode, the DMA base address must point to a word containing a complete pixel
(possible values of PIXELOFF are 0 and 8). This means that the horizontal origin of the displaying
window must be a multiple of 4 pixels or a multiple of 4 pixels minus 1 (x = 4n or x = 4n-1, valid ori-
gins are pixel 0,3,4,7,8,11,12, etc.).
AT32AP7002
762