AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 599

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

31.3
Figure 31-1. Block diagram:
31.4
31.4.1
31.4.2
32054F–AVR32–09/09
Block Diagram
Product Dependencies
Power Management
Interrupt
UTMI
The USBA clock is generated by the Power Manager. Before using the USBA, the programmer
must ensure that the USBA clock is enabled in the Power Manager.
To prevent bus errors the USBA operation must be terminated before entering sleep mode.
The USB HS PHY clock has to be enabled before using the USBA. The description of this clock
can be found in the Peripherals chapter under Clock Connections.
The USBA interface has an interrupt line connected to the Interrupt Controller. Handling the
USBA interrupt requires programming the interrupt controller before configuring the USBA.
16/8 bits
USB Clock
Domain
EPT
Alloc
DPRAM
USB2.0
CORE
System Clock
Domain
ctrl
status
Rd/Wr/Ready
Peripheral Bus
Interface
32 bits
DMA
Local
HSB
Slave
interface
HSB1
HSB0
Master
Slave
HSB
Multiplexer
AT32AP7002
PB bus
HSB bus
HSB bus
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